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Re: PATCH: PR target/40470: unabl e to find a register to spill in class ‘SSE_FIRST_REG’

H.J. Lu wrote:
On Wed, Jun 17, 2009 at 8:36 AM, H.J. Lu<> wrote:
On Wed, Jun 17, 2009 at 8:22 AM, Jeff Law<> wrote:
Steven Bosscher wrote:
On 6/17/09, Jeff Law <> wrote:

Richard Guenther wrote:

On Wed, Jun 17, 2009 at 4:01 PM, H.J. Lu<> wrote:


Some SSE4 instructions have implicit XMM0 operand. This patch helps RA
deal with them by forcing operand into XMM0 during expand. OK for trunk
and 4.4?

I don't think it's a particularly good idea to put things in hardregs
that early.

Agreed. In fact, it can have horrific performance impacts.

Why? Most optimizazions that can be done for this insn can only be
done on GIMPLE, right?  And the insn must have that specific register.
So unless I am missing something, I don't see why this patch would do
any harm.

It'll completely disable the RTL loop optimizers. Granted this is less
important today than before, but it's still bad. And more importantly, the
register allocators and reload should be fixed to DTRT rather than hacking
around them.
I am all for it. Vladimir, how hard to fix RA for this?

This fails in gcc 4.3/4.4/4.5. Fixing RA/reload sounds good for
4.5. Is that a good idea for 4.4, especially for 4.3? Can I apply
my patch to 4.3 first?
I would recommend against until someone has done a real analysis of the problem. Once that analysis is done we can weigh the correct fix vs the hack in terms of performance and potential for introducing regressions.


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