This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [Patch] Add and use new RTL predicates for i386 target
- From: Shujing Zhao <pearly dot zhao at oracle dot com>
- To: Paolo Bonzini <paolo dot bonzini at gmail dot com>
- Cc: gcc-patches at gcc dot gnu dot org, Uros Bizjak <ubizjak at gmail dot com>
- Date: Fri, 12 Jun 2009 17:09:10 +0800
- Subject: Re: [Patch] Add and use new RTL predicates for i386 target
- References: <4A31CAA3.2070102@oracle.com> <4A321034.7090301@gmail.com>
Thanks. Remove the extra parentheses.
On 06/12/2009 04:22 PM, Paolo Bonzini wrote:
I must say I don't see the point of extra RTL predicates, but I'll let
others judge. MEM and REG should be everything that's needed IMHO.
I found the point from "Simple GCC Projects":
<http://gcc.gnu.org/projects/beginner.html>
"Also, for many common comparisons there is no predicate yet. See which
ones are worth having a predicate for, and add them. You can find a
number of suggestions <http://gcc.gnu.org/ml/gcc/2004-05/msg00447.html>
in the mailing list archives"
The comparisons that I defined predicates are really used at many
places, such as GET_CODE (X) == SUBREG used at more than three hundreds
lines even at middle end. The new predicates would make the RTL
optimizers more readable.
Anyway,
+ if (!(X87_FLOAT_MODE_P (mode) && (CONST_DOUBLE_P (x))))
Extra parentheses.
Thanks. Removed the extra parentheses and update the patch the extra
parentheses.
Thanks
Pearly
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 148366)
+++ config/i386/i386.md (working copy)
@@ -3037,7 +3037,7 @@ (define_insn "*movsf_1"
|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
|| (!TARGET_SSE_MATH && optimize_function_for_size_p (cfun)
&& standard_80387_constant_p (operands[1]))
- || GET_CODE (operands[1]) != CONST_DOUBLE
+ || !CONST_DOUBLE_P (operands[1])
|| memory_operand (operands[0], SFmode))"
{
switch (which_alternative)
@@ -3207,7 +3207,7 @@ (define_insn "*movdf_nointeger"
&& optimize_function_for_size_p (cfun)
&& !memory_operand (operands[0], DFmode)
&& standard_80387_constant_p (operands[1]))
- || GET_CODE (operands[1]) != CONST_DOUBLE
+ || !CONST_DOUBLE_P (operands[1])
|| ((optimize_function_for_size_p (cfun)
|| !TARGET_MEMORY_MISMATCH_STALL
|| reload_in_progress || reload_completed)
@@ -3359,7 +3359,7 @@ (define_insn "*movdf_integer_rex64"
|| (!(TARGET_SSE2 && TARGET_SSE_MATH)
&& optimize_function_for_size_p (cfun)
&& standard_80387_constant_p (operands[1]))
- || GET_CODE (operands[1]) != CONST_DOUBLE
+ || !CONST_DOUBLE_P (operands[1])
|| memory_operand (operands[0], DFmode))"
{
switch (which_alternative)
@@ -3499,7 +3499,7 @@ (define_insn "*movdf_integer"
|| (!(TARGET_SSE2 && TARGET_SSE_MATH)
&& optimize_function_for_size_p (cfun)
&& standard_80387_constant_p (operands[1]))
- || GET_CODE (operands[1]) != CONST_DOUBLE
+ || !CONST_DOUBLE_P (operands[1])
|| memory_operand (operands[0], DFmode))"
{
switch (which_alternative)
@@ -3616,10 +3616,10 @@ (define_split
"reload_completed
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))
&& ! (ANY_FP_REG_P (operands[0]) ||
- (GET_CODE (operands[0]) == SUBREG
+ (SUBREG_P (operands[0])
&& ANY_FP_REG_P (SUBREG_REG (operands[0]))))
&& ! (ANY_FP_REG_P (operands[1]) ||
- (GET_CODE (operands[1]) == SUBREG
+ (SUBREG_P (operands[1])
&& ANY_FP_REG_P (SUBREG_REG (operands[1]))))"
[(const_int 0)]
"ix86_split_long_move (operands); DONE;")
@@ -3702,7 +3702,7 @@ (define_insn "*movxf_nointeger"
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))
&& (reload_in_progress || reload_completed
|| standard_80387_constant_p (operands[1])
- || GET_CODE (operands[1]) != CONST_DOUBLE
+ || !CONST_DOUBLE_P (operands[1])
|| memory_operand (operands[0], XFmode))"
{
switch (which_alternative)
@@ -3729,7 +3729,7 @@ (define_insn "*movxf_integer"
"optimize_function_for_speed_p (cfun)
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))
&& (reload_in_progress || reload_completed
- || GET_CODE (operands[1]) != CONST_DOUBLE
+ || !CONST_DOUBLE_P (operands[1])
|| memory_operand (operands[0], XFmode))"
{
switch (which_alternative)
@@ -3840,10 +3840,10 @@ (define_split
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))
&& GET_MODE (operands[0]) == XFmode
&& ! (ANY_FP_REG_P (operands[0]) ||
- (GET_CODE (operands[0]) == SUBREG
+ (SUBREG_P (operands[0])
&& ANY_FP_REG_P (SUBREG_REG (operands[0]))))
&& ! (ANY_FP_REG_P (operands[1]) ||
- (GET_CODE (operands[1]) == SUBREG
+ (SUBREG_P (operands[1])
&& ANY_FP_REG_P (SUBREG_REG (operands[1]))))"
[(const_int 0)]
"ix86_split_long_move (operands); DONE;")
@@ -3863,7 +3863,7 @@ (define_split
rtx c = operands[2];
rtx r = operands[0];
- if (GET_CODE (r) == SUBREG)
+ if (SUBREG_P (r))
r = SUBREG_REG (r);
if (SSE_REG_P (r))
@@ -3895,7 +3895,7 @@ (define_split
rtx c = operands[2];
rtx r = operands[0];
- if (GET_CODE (r) == SUBREG)
+ if (SUBREG_P (r))
r = SUBREG_REG (r);
if (SSE_REG_P (r))
@@ -4504,7 +4504,7 @@ (define_expand "extendsfdf2"
{
/* ??? Needed for compress_float_constant since all fp constants
are LEGITIMATE_CONSTANT_P. */
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
{
if ((!TARGET_SSE2 || TARGET_MIX_SSE_I387)
&& standard_80387_constant_p (operands[1]) > 0)
@@ -4609,7 +4609,7 @@ (define_expand "extend<mode>xf2"
{
/* ??? Needed for compress_float_constant since all fp constants
are LEGITIMATE_CONSTANT_P. */
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
{
if (standard_80387_constant_p (operands[1]) > 0)
{
@@ -5544,7 +5544,7 @@ (define_split
&& TARGET_INTER_UNIT_CONVERSIONS
&& reload_completed
&& (SSE_REG_P (operands[0])
- || (GET_CODE (operands[0]) == SUBREG
+ || (SUBREG_P (operands[0])
&& SSE_REG_P (operands[0])))"
[(set (match_dup 0) (float:MODEF (match_dup 1)))]
"")
@@ -5558,7 +5558,7 @@ (define_split
&& !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
&& reload_completed
&& (SSE_REG_P (operands[0])
- || (GET_CODE (operands[0]) == SUBREG
+ || (SUBREG_P (operands[0])
&& SSE_REG_P (operands[0])))"
[(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (float:MODEF (match_dup 2)))]
@@ -5646,7 +5646,7 @@ (define_split
&& TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun)
&& reload_completed
&& (SSE_REG_P (operands[0])
- || (GET_CODE (operands[0]) == SUBREG
+ || (SUBREG_P (operands[0])
&& SSE_REG_P (operands[0])))"
[(const_int 0)]
{
@@ -5654,7 +5654,7 @@ (define_split
operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0],
<MODE>mode, 0);
- if (GET_CODE (op1) == SUBREG)
+ if (SUBREG_P (op1))
op1 = SUBREG_REG (op1);
if (GENERAL_REG_P (op1) && TARGET_INTER_UNIT_MOVES)
@@ -5687,7 +5687,7 @@ (define_split
&& TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun)
&& reload_completed
&& (SSE_REG_P (operands[0])
- || (GET_CODE (operands[0]) == SUBREG
+ || (SUBREG_P (operands[0])
&& SSE_REG_P (operands[0])))"
[(const_int 0)]
{
@@ -5709,7 +5709,7 @@ (define_split
&& TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun)
&& reload_completed
&& (SSE_REG_P (operands[0])
- || (GET_CODE (operands[0]) == SUBREG
+ || (SUBREG_P (operands[0])
&& SSE_REG_P (operands[0])))"
[(const_int 0)]
{
@@ -5717,7 +5717,7 @@ (define_split
operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0],
<MODE>mode, 0);
- if (GET_CODE (op1) == SUBREG)
+ if (SUBREG_P (op1))
op1 = SUBREG_REG (op1);
if (GENERAL_REG_P (op1) && TARGET_INTER_UNIT_MOVES)
@@ -5744,7 +5744,7 @@ (define_split
&& TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun)
&& reload_completed
&& (SSE_REG_P (operands[0])
- || (GET_CODE (operands[0]) == SUBREG
+ || (SUBREG_P (operands[0])
&& SSE_REG_P (operands[0])))"
[(const_int 0)]
{
@@ -5803,7 +5803,7 @@ (define_split
&& (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
&& reload_completed
&& (SSE_REG_P (operands[0])
- || (GET_CODE (operands[0]) == SUBREG
+ || (SUBREG_P (operands[0])
&& SSE_REG_P (operands[0])))"
[(set (match_dup 0) (float:MODEF (match_dup 1)))]
"")
@@ -5838,7 +5838,7 @@ (define_split
&& !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
&& reload_completed
&& (SSE_REG_P (operands[0])
- || (GET_CODE (operands[0]) == SUBREG
+ || (SUBREG_P (operands[0])
&& SSE_REG_P (operands[0])))"
[(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (float:MODEF (match_dup 2)))]
@@ -5852,7 +5852,7 @@ (define_split
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& reload_completed
&& (SSE_REG_P (operands[0])
- || (GET_CODE (operands[0]) == SUBREG
+ || (SUBREG_P (operands[0])
&& SSE_REG_P (operands[0])))"
[(set (match_dup 0) (float:MODEF (match_dup 1)))]
"")
@@ -9502,7 +9502,7 @@ (define_split
val = adjust_address (val, mode, 0);
}
}
- else if (GET_CODE (val) == SUBREG
+ else if (SUBREG_P (val)
&& (submode = GET_MODE (SUBREG_REG (val)),
GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (submode))
&& pos + len <= GET_MODE_BITSIZE (submode))
@@ -22368,7 +22368,7 @@ (define_insn "*sse_prologue_save_insn"
operands[0] = gen_rtx_MEM (Pmode,
gen_rtx_PLUS (Pmode, operands[0], operands[4]));
/* VEX instruction with a REX prefix will #UD. */
- if (TARGET_AVX && GET_CODE (XEXP (operands[0], 0)) != PLUS)
+ if (TARGET_AVX && !PLUS_P (XEXP (operands[0], 0)))
gcc_unreachable ();
output_asm_insn ("jmp\t%A1", operands);
@@ -22377,7 +22377,7 @@ (define_insn "*sse_prologue_save_insn"
operands[4] = adjust_address (operands[0], DImode, i*16);
operands[5] = gen_rtx_REG (TImode, SSE_REGNO (i));
PUT_MODE (operands[4], TImode);
- if (GET_CODE (XEXP (operands[0], 0)) != PLUS)
+ if (!PLUS_P (XEXP (operands[0], 0)))
output_asm_insn ("rex", operands);
output_asm_insn ("%vmovaps\t{%5, %4|%4, %5}", operands);
}
Index: config/i386/predicates.md
===================================================================
--- config/i386/predicates.md (revision 148366)
+++ config/i386/predicates.md (working copy)
@@ -47,7 +47,7 @@ (define_predicate "mmx_reg_operand"
(define_predicate "q_regs_operand"
(match_operand 0 "register_operand")
{
- if (GET_CODE (op) == SUBREG)
+ if (SUBREG_P (op))
op = SUBREG_REG (op);
return ANY_QI_REG_P (op);
})
@@ -59,7 +59,7 @@ (define_special_predicate "ext_register_
if ((!TARGET_64BIT || GET_MODE (op) != DImode)
&& GET_MODE (op) != SImode && GET_MODE (op) != HImode)
return 0;
- if (GET_CODE (op) == SUBREG)
+ if (SUBREG_P (op))
op = SUBREG_REG (op);
/* Be careful to accept only registers having upper parts. */
@@ -155,7 +155,7 @@ (define_predicate "x86_64_immediate_oper
break;
}
- if (GET_CODE (XEXP (op, 0)) == PLUS)
+ if (PLUS_P (XEXP (op, 0)))
{
rtx op1 = XEXP (XEXP (op, 0), 0);
rtx op2 = XEXP (XEXP (op, 0), 1);
@@ -263,7 +263,7 @@ (define_predicate "x86_64_zext_immediate
case CONST:
/* We also may accept the offsetted memory references in certain
special cases. */
- if (GET_CODE (XEXP (op, 0)) == PLUS)
+ if (PLUS_P (XEXP (op, 0)))
{
rtx op1 = XEXP (XEXP (op, 0), 0);
rtx op2 = XEXP (XEXP (op, 0), 1);
@@ -357,7 +357,7 @@ (define_predicate "pic_32bit_operand"
if (TARGET_64BIT && GET_CODE (op) == CONST)
{
op = XEXP (op, 0);
- if (GET_CODE (op) == PLUS && CONST_INT_P (XEXP (op, 1)))
+ if (PLUS_P (op) && CONST_INT_P (XEXP (op, 1)))
op = XEXP (op, 0);
if (GET_CODE (op) == UNSPEC
&& (XINT (op, 1) == UNSPEC_GOTOFF
@@ -396,7 +396,7 @@ (define_predicate "symbolic_operand"
|| XINT (op, 1) == UNSPEC_GOTOFF
|| XINT (op, 1) == UNSPEC_GOTPCREL)))
return 1;
- if (GET_CODE (op) != PLUS
+ if (!PLUS_P (op)
|| !CONST_INT_P (XEXP (op, 1)))
return 0;
@@ -430,7 +430,7 @@ (define_predicate "pic_symbolic_operand"
if (GET_CODE (op) == UNSPEC
&& XINT (op, 1) == UNSPEC_GOTPCREL)
return 1;
- if (GET_CODE (op) == PLUS
+ if (PLUS_P (op)
&& GET_CODE (XEXP (op, 0)) == UNSPEC
&& XINT (XEXP (op, 0), 1) == UNSPEC_GOTPCREL)
return 1;
@@ -439,7 +439,7 @@ (define_predicate "pic_symbolic_operand"
{
if (GET_CODE (op) == UNSPEC)
return 1;
- if (GET_CODE (op) != PLUS
+ if (!PLUS_P (op)
|| !CONST_INT_P (XEXP (op, 1)))
return 0;
op = XEXP (op, 0);
@@ -455,7 +455,7 @@ (define_predicate "local_symbolic_operan
(match_code "const,label_ref,symbol_ref")
{
if (GET_CODE (op) == CONST
- && GET_CODE (XEXP (op, 0)) == PLUS
+ && PLUS_P (XEXP (op, 0))
&& CONST_INT_P (XEXP (XEXP (op, 0), 1)))
op = XEXP (XEXP (op, 0), 0);
@@ -525,7 +525,7 @@ (define_predicate "constant_call_address
(define_predicate "register_no_elim_operand"
(match_operand 0 "register_operand")
{
- if (GET_CODE (op) == SUBREG)
+ if (SUBREG_P (op))
op = SUBREG_REG (op);
return !(op == arg_pointer_rtx
|| op == frame_pointer_rtx
@@ -538,7 +538,7 @@ (define_predicate "register_no_elim_oper
(define_predicate "index_register_operand"
(match_operand 0 "register_operand")
{
- if (GET_CODE (op) == SUBREG)
+ if (SUBREG_P (op))
op = SUBREG_REG (op);
if (reload_in_progress || reload_completed)
return REG_OK_FOR_INDEX_STRICT_P (op);
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c (revision 148366)
+++ config/i386/i386.c (working copy)
@@ -7117,11 +7117,11 @@ ix86_check_movabs (rtx insn, int opnum)
rtx set, mem;
set = PATTERN (insn);
- if (GET_CODE (set) == PARALLEL)
+ if (PARALLEL_P (set))
set = XVECEXP (set, 0, 0);
- gcc_assert (GET_CODE (set) == SET);
+ gcc_assert (SET_P (set));
mem = XEXP (set, opnum);
- while (GET_CODE (mem) == SUBREG)
+ while (SUBREG_P (mem))
mem = SUBREG_REG (mem);
gcc_assert (MEM_P (mem));
return (volatile_ok || !MEM_VOLATILE_P (mem));
@@ -7163,7 +7163,7 @@ standard_80387_constant_p (rtx x)
REAL_VALUE_TYPE r;
- if (!(X87_FLOAT_MODE_P (mode) && (GET_CODE (x) == CONST_DOUBLE)))
+ if (!(X87_FLOAT_MODE_P (mode) && CONST_DOUBLE_P (x)))
return -1;
if (x == CONST0_RTX (mode))
@@ -9053,9 +9053,9 @@ ix86_decompose_address (rtx addr, struct
int retval = 1;
enum ix86_address_seg seg = SEG_DEFAULT;
- if (REG_P (addr) || GET_CODE (addr) == SUBREG)
+ if (REG_P (addr) || SUBREG_P (addr))
base = addr;
- else if (GET_CODE (addr) == PLUS)
+ else if (PLUS_P (addr))
{
rtx addends[4], op;
int n = 0, i;
@@ -9068,7 +9068,7 @@ ix86_decompose_address (rtx addr, struct
addends[n++] = XEXP (op, 1);
op = XEXP (op, 0);
}
- while (GET_CODE (op) == PLUS);
+ while (PLUS_P (op));
if (n >= 4)
return 0;
addends[n] = op;
@@ -9149,8 +9149,8 @@ ix86_decompose_address (rtx addr, struct
scale = INTVAL (scale_rtx);
}
- base_reg = base && GET_CODE (base) == SUBREG ? SUBREG_REG (base) : base;
- index_reg = index && GET_CODE (index) == SUBREG ? SUBREG_REG (index) : index;
+ base_reg = base && SUBREG_P (base) ? SUBREG_REG (base) : base;
+ index_reg = index && SUBREG_P (index) ? SUBREG_REG (index) : index;
/* Avoid useless 0 displacement. */
if (disp == const0_rtx && (base || index))
@@ -9220,9 +9220,9 @@ ix86_address_cost (rtx x, bool speed ATT
gcc_assert (ok);
- if (parts.base && GET_CODE (parts.base) == SUBREG)
+ if (parts.base && SUBREG_P (parts.base))
parts.base = SUBREG_REG (parts.base);
- if (parts.index && GET_CODE (parts.index) == SUBREG)
+ if (parts.index && SUBREG_P (parts.index))
parts.index = SUBREG_REG (parts.index);
/* Attempt to minimize number of registers in the address. */
@@ -9286,7 +9286,7 @@ legitimate_constant_p (rtx x)
case CONST:
x = XEXP (x, 0);
- if (GET_CODE (x) == PLUS)
+ if (PLUS_P (x))
{
if (!CONST_INT_P (XEXP (x, 1)))
return false;
@@ -9389,7 +9389,7 @@ legitimate_pic_operand_p (rtx x)
{
case CONST:
inner = XEXP (x, 0);
- if (GET_CODE (inner) == PLUS
+ if (PLUS_P (inner)
&& CONST_INT_P (XEXP (inner, 1)))
inner = XEXP (inner, 0);
@@ -9441,7 +9441,7 @@ legitimate_pic_address_disp_p (rtx disp)
return true;
case CONST:
- if (GET_CODE (XEXP (disp, 0)) != PLUS)
+ if (!PLUS_P (XEXP (disp, 0)))
break;
op0 = XEXP (XEXP (disp, 0), 0);
op1 = XEXP (XEXP (disp, 0), 1);
@@ -9489,7 +9489,7 @@ legitimate_pic_address_disp_p (rtx disp)
}
saw_plus = false;
- if (GET_CODE (disp) == PLUS)
+ if (PLUS_P (disp))
{
if (!CONST_INT_P (XEXP (disp, 1)))
return 0;
@@ -9585,7 +9585,7 @@ ix86_legitimate_address_p (enum machine_
if (REG_P (base))
reg = base;
- else if (GET_CODE (base) == SUBREG
+ else if (SUBREG_P (base)
&& REG_P (SUBREG_REG (base))
&& GET_MODE_SIZE (GET_MODE (SUBREG_REG (base)))
<= UNITS_PER_WORD)
@@ -9621,7 +9621,7 @@ ix86_legitimate_address_p (enum machine_
if (REG_P (index))
reg = index;
- else if (GET_CODE (index) == SUBREG
+ else if (SUBREG_P (index)
&& REG_P (SUBREG_REG (index))
&& GET_MODE_SIZE (GET_MODE (SUBREG_REG (index)))
<= UNITS_PER_WORD)
@@ -9715,7 +9715,7 @@ ix86_legitimate_address_p (enum machine_
{
/* foo@dtpoff(%rX) is ok. */
if (GET_CODE (disp) != CONST
- || GET_CODE (XEXP (disp, 0)) != PLUS
+ || !PLUS_P (XEXP (disp, 0))
|| GET_CODE (XEXP (XEXP (disp, 0), 0)) != UNSPEC
|| !CONST_INT_P (XEXP (XEXP (disp, 0), 1))
|| (XINT (XEXP (XEXP (disp, 0), 0), 1) != UNSPEC_DTPOFF
@@ -9846,7 +9846,7 @@ legitimize_pic_address (rtx orig, rtx re
df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true);
if (GET_CODE (addr) == CONST)
addr = XEXP (addr, 0);
- if (GET_CODE (addr) == PLUS)
+ if (PLUS_P (addr))
{
new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (addr, 0)),
UNSPEC_GOTOFF);
@@ -9878,7 +9878,7 @@ legitimize_pic_address (rtx orig, rtx re
df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true);
if (GET_CODE (addr) == CONST)
addr = XEXP (addr, 0);
- if (GET_CODE (addr) == PLUS)
+ if (PLUS_P (addr))
{
new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (addr, 0)),
UNSPEC_GOTOFF);
@@ -9904,7 +9904,7 @@ legitimize_pic_address (rtx orig, rtx re
{
if (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_DLLIMPORT_P (addr))
return legitimize_dllimport_symbol (addr, true);
- if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
+ if (GET_CODE (addr) == CONST && PLUS_P (XEXP (addr, 0))
&& GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF
&& SYMBOL_REF_DLLIMPORT_P (XEXP (XEXP (addr, 0), 0)))
{
@@ -9970,12 +9970,12 @@ legitimize_pic_address (rtx orig, rtx re
unspecs that can get here are ours. Not that we could do
anything with them anyway.... */
if (GET_CODE (addr) == UNSPEC
- || (GET_CODE (addr) == PLUS
+ || (PLUS_P (addr)
&& GET_CODE (XEXP (addr, 0)) == UNSPEC))
return orig;
- gcc_assert (GET_CODE (addr) == PLUS);
+ gcc_assert (PLUS_P (addr));
}
- if (GET_CODE (addr) == PLUS)
+ if (PLUS_P (addr))
{
rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
@@ -10021,7 +10021,7 @@ legitimize_pic_address (rtx orig, rtx re
new_rtx = plus_constant (base, INTVAL (new_rtx));
else
{
- if (GET_CODE (new_rtx) == PLUS && CONSTANT_P (XEXP (new_rtx, 1)))
+ if (PLUS_P (new_rtx) && CONSTANT_P (XEXP (new_rtx, 1)))
{
base = gen_rtx_PLUS (Pmode, base, XEXP (new_rtx, 0));
new_rtx = XEXP (new_rtx, 1);
@@ -10318,7 +10318,7 @@ ix86_legitimize_address (rtx x, rtx oldx
if (log)
return legitimize_tls_address (x, (enum tls_model) log, false);
if (GET_CODE (x) == CONST
- && GET_CODE (XEXP (x, 0)) == PLUS
+ && PLUS_P (XEXP (x, 0))
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
&& (log = SYMBOL_REF_TLS_MODEL (XEXP (XEXP (x, 0), 0))))
{
@@ -10332,7 +10332,7 @@ ix86_legitimize_address (rtx x, rtx oldx
if (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_DLLIMPORT_P (x))
return legitimize_dllimport_symbol (x, true);
if (GET_CODE (x) == CONST
- && GET_CODE (XEXP (x, 0)) == PLUS
+ && PLUS_P (XEXP (x, 0))
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
&& SYMBOL_REF_DLLIMPORT_P (XEXP (XEXP (x, 0), 0)))
{
@@ -10355,7 +10355,7 @@ ix86_legitimize_address (rtx x, rtx oldx
GEN_INT (1 << log));
}
- if (GET_CODE (x) == PLUS)
+ if (PLUS_P (x))
{
/* Canonicalize shifts by 0, 1, 2, 3 into multiply. */
@@ -10394,7 +10394,7 @@ ix86_legitimize_address (rtx x, rtx oldx
into (plus (plus (mult (reg) (const)) (reg)) (const)). This can be
created by virtual register instantiation, register elimination, and
similar optimizations. */
- if (GET_CODE (XEXP (x, 0)) == MULT && GET_CODE (XEXP (x, 1)) == PLUS)
+ if (GET_CODE (XEXP (x, 0)) == MULT && PLUS_P (XEXP (x, 1)))
{
changed = 1;
x = gen_rtx_PLUS (Pmode,
@@ -10406,9 +10406,9 @@ ix86_legitimize_address (rtx x, rtx oldx
/* Canonicalize
(plus (plus (mult (reg) (const)) (plus (reg) (const))) const)
into (plus (plus (mult (reg) (const)) (reg)) (const)). */
- else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == PLUS
+ else if (PLUS_P (x) && PLUS_P (XEXP (x, 0))
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT
- && GET_CODE (XEXP (XEXP (x, 0), 1)) == PLUS
+ && PLUS_P (XEXP (XEXP (x, 0), 1))
&& CONSTANT_P (XEXP (x, 1)))
{
rtx constant;
@@ -10725,14 +10725,14 @@ ix86_delegitimize_address (rtx orig_x)
return XVECEXP (XEXP (x, 0), 0, 0);
}
- if (GET_CODE (x) != PLUS
+ if (!PLUS_P (x)
|| GET_CODE (XEXP (x, 1)) != CONST)
return orig_x;
if (ix86_pic_register_p (XEXP (x, 0)))
/* %ebx + GOT/GOTOFF */
;
- else if (GET_CODE (XEXP (x, 0)) == PLUS)
+ else if (PLUS_P (XEXP (x, 0)))
{
/* %ebx + %reg * scale + GOT/GOTOFF */
reg_addend = XEXP (x, 0);
@@ -10751,7 +10751,7 @@ ix86_delegitimize_address (rtx orig_x)
return orig_x;
x = XEXP (XEXP (x, 1), 0);
- if (GET_CODE (x) == PLUS
+ if (PLUS_P (x)
&& CONST_INT_P (XEXP (x, 1)))
{
const_addend = XEXP (x, 1);
@@ -10791,9 +10791,9 @@ ix86_find_base_term (rtx x)
if (GET_CODE (x) != CONST)
return x;
term = XEXP (x, 0);
- if (GET_CODE (term) == PLUS
+ if (PLUS_P (term)
&& (CONST_INT_P (XEXP (term, 1))
- || GET_CODE (XEXP (term, 1)) == CONST_DOUBLE))
+ || CONST_DOUBLE_P (XEXP (term, 1))))
term = XEXP (term, 0);
if (GET_CODE (term) != UNSPEC
|| XINT (term, 1) != UNSPEC_GOTPCREL)
@@ -11691,7 +11691,7 @@ print_operand (FILE *file, rtx x, int co
output_address (x);
}
- else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode)
+ else if (CONST_DOUBLE_P (x) && GET_MODE (x) == SFmode)
{
REAL_VALUE_TYPE r;
long l;
@@ -11705,7 +11705,7 @@ print_operand (FILE *file, rtx x, int co
}
/* These float cases don't actually occur as immediate operands. */
- else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode)
+ else if (CONST_DOUBLE_P (x) && GET_MODE (x) == DFmode)
{
char dstr[30];
@@ -11713,7 +11713,7 @@ print_operand (FILE *file, rtx x, int co
fprintf (file, "%s", dstr);
}
- else if (GET_CODE (x) == CONST_DOUBLE
+ else if (CONST_DOUBLE_P (x)
&& GET_MODE (x) == XFmode)
{
char dstr[30];
@@ -11735,7 +11735,7 @@ print_operand (FILE *file, rtx x, int co
if (code != 'P')
{
- if (CONST_INT_P (x) || GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_INT_P (x) || CONST_DOUBLE_P (x))
{
if (ASSEMBLER_DIALECT == ASM_ATT)
putc ('$', file);
@@ -11795,7 +11795,7 @@ print_operand_address (FILE *file, rtx a
rtx symbol = disp;
if (GET_CODE (disp) == CONST
- && GET_CODE (XEXP (disp, 0)) == PLUS
+ && PLUS_P (XEXP (disp, 0))
&& CONST_INT_P (XEXP (XEXP (disp, 0), 1)))
symbol = XEXP (XEXP (disp, 0), 0);
@@ -11853,7 +11853,7 @@ print_operand_address (FILE *file, rtx a
{
/* Pull out the offset of a symbol; print any symbol itself. */
if (GET_CODE (disp) == CONST
- && GET_CODE (XEXP (disp, 0)) == PLUS
+ && PLUS_P (XEXP (disp, 0))
&& CONST_INT_P (XEXP (XEXP (disp, 0), 1)))
{
offset = XEXP (XEXP (disp, 0), 1);
@@ -12690,7 +12690,7 @@ ix86_expand_move (enum machine_mode mode
op1 = legitimize_dllimport_symbol (op1, false);
}
else if (GET_CODE (op1) == CONST
- && GET_CODE (XEXP (op1, 0)) == PLUS
+ && PLUS_P (XEXP (op1, 0))
&& GET_CODE (XEXP (XEXP (op1, 0), 0)) == SYMBOL_REF)
{
rtx addend = XEXP (XEXP (op1, 0), 1);
@@ -12772,7 +12772,7 @@ ix86_expand_move (enum machine_mode mode
if (can_create_pseudo_p ()
&& FLOAT_MODE_P (mode)
- && GET_CODE (op1) == CONST_DOUBLE)
+ && CONST_DOUBLE_P (op1))
{
/* If we are loading a floating point constant to a register,
force the value to memory now, since we'll get better code
@@ -12805,7 +12805,7 @@ ix86_expand_vector_move (enum machine_mo
if (can_create_pseudo_p ()
&& register_operand (op0, mode)
&& (CONSTANT_P (op1)
- || (GET_CODE (op1) == SUBREG
+ || (SUBREG_P (op1)
&& CONSTANT_P (SUBREG_REG (op1))))
&& standard_sse_constant_p (op1) <= 0)
op1 = validize_mem (force_const_mem (mode, op1));
@@ -12821,7 +12821,7 @@ ix86_expand_vector_move (enum machine_mo
/* ix86_expand_vector_move_misalign() does not like constants ... */
if (CONSTANT_P (op1)
- || (GET_CODE (op1) == SUBREG
+ || (SUBREG_P (op1)
&& CONSTANT_P (SUBREG_REG (op1))))
op1 = validize_mem (force_const_mem (mode, op1));
@@ -14065,7 +14065,7 @@ ix86_expand_copysign (rtx operands[])
mode = GET_MODE (dest);
- if (GET_CODE (op0) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (op0))
{
rtx (*copysign_insn)(rtx, rtx, rtx, rtx);
@@ -14237,9 +14237,9 @@ ix86_match_ccmode (rtx insn, enum machin
enum machine_mode set_mode;
set = PATTERN (insn);
- if (GET_CODE (set) == PARALLEL)
+ if (PARALLEL_P (set))
set = XVECEXP (set, 0, 0);
- gcc_assert (GET_CODE (set) == SET);
+ gcc_assert (SET_P (set));
gcc_assert (GET_CODE (SET_SRC (set)) == COMPARE);
set_mode = GET_MODE (SET_DEST (set));
@@ -14333,7 +14333,7 @@ ix86_cc_mode (enum rtx_code code, rtx op
case GEU: /* CF=0 */
case LTU: /* CF=1 */
/* Detect overflow checks. They need just the carry flag. */
- if (GET_CODE (op0) == PLUS
+ if (PLUS_P (op0)
&& rtx_equal_p (op1, XEXP (op0, 0)))
return CCCmode;
else
@@ -16815,7 +16815,7 @@ ix86_split_to_parts (rtx operand, rtx *p
for (i = 1; i < size; i++)
parts[i] = adjust_address (operand, SImode, 4 * i);
}
- else if (GET_CODE (operand) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (operand))
{
REAL_VALUE_TYPE r;
long l[4];
@@ -16864,7 +16864,7 @@ ix86_split_to_parts (rtx operand, rtx *p
parts[0] = operand;
parts[1] = adjust_address (operand, upper_mode, 8);
}
- else if (GET_CODE (operand) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (operand))
{
REAL_VALUE_TYPE r;
long l[4];
@@ -19581,9 +19581,9 @@ memory_address_length (rtx addr)
ok = ix86_decompose_address (addr, &parts);
gcc_assert (ok);
- if (parts.base && GET_CODE (parts.base) == SUBREG)
+ if (parts.base && SUBREG_P (parts.base))
parts.base = SUBREG_REG (parts.base);
- if (parts.index && GET_CODE (parts.index) == SUBREG)
+ if (parts.index && SUBREG_P (parts.index))
parts.index = SUBREG_REG (parts.index);
base = parts.base;
@@ -19627,7 +19627,7 @@ memory_address_length (rtx addr)
if (GET_CODE (disp) == CONST)
symbol = XEXP (disp, 0);
- if (GET_CODE (symbol) == PLUS
+ if (PLUS_P (symbol)
&& CONST_INT_P (XEXP (symbol, 1)))
symbol = XEXP (symbol, 0);
@@ -19747,17 +19747,17 @@ ix86_attr_length_address_default (rtx in
{
rtx set = PATTERN (insn), addr;
- if (GET_CODE (set) == PARALLEL)
+ if (PARALLEL_P (set))
set = XVECEXP (set, 0, 0);
- gcc_assert (GET_CODE (set) == SET);
+ gcc_assert (SET_P (set));
addr = SET_SRC (set);
if (TARGET_64BIT && get_attr_mode (insn) == MODE_SI)
{
if (GET_CODE (addr) == ZERO_EXTEND)
addr = XEXP (addr, 0);
- if (GET_CODE (addr) == SUBREG)
+ if (SUBREG_P (addr))
addr = SUBREG_REG (addr);
}
@@ -19877,10 +19877,10 @@ ix86_flags_dependent (rtx insn, rtx dep_
set = SET_DEST (set);
set2 = NULL_RTX;
}
- else if (GET_CODE (PATTERN (dep_insn)) == PARALLEL
+ else if (PARALLEL_P (PATTERN (dep_insn))
&& XVECLEN (PATTERN (dep_insn), 0) == 2
- && GET_CODE (XVECEXP (PATTERN (dep_insn), 0, 0)) == SET
- && GET_CODE (XVECEXP (PATTERN (dep_insn), 0, 1)) == SET)
+ && SET_P (XVECEXP (PATTERN (dep_insn), 0, 0))
+ && SET_P (XVECEXP (PATTERN (dep_insn), 0, 1)))
{
set = SET_DEST (XVECEXP (PATTERN (dep_insn), 0, 0));
set2 = SET_DEST (XVECEXP (PATTERN (dep_insn), 0, 0));
@@ -19948,10 +19948,10 @@ ix86_adjust_cost (rtx insn, rtx link, rt
{
rtx addr = PATTERN (insn);
- if (GET_CODE (addr) == PARALLEL)
+ if (PARALLEL_P (addr))
addr = XVECEXP (addr, 0, 0);
- gcc_assert (GET_CODE (addr) == SET);
+ gcc_assert (SET_P (addr));
addr = SET_SRC (addr);
if (modified_in_p (addr, dep_insn))
@@ -26204,7 +26204,7 @@ ix86_preferred_reload_class (rtx x, enum
return SSE_CLASS_P (regclass) ? regclass : NO_REGS;
/* Floating-point constants need more complex checks. */
- if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) != VOIDmode)
+ if (CONST_DOUBLE_P (x) && GET_MODE (x) != VOIDmode)
{
/* General regs can load everything. */
if (reg_class_subset_p (regclass, GENERAL_REGS))
@@ -26233,7 +26233,7 @@ ix86_preferred_reload_class (rtx x, enum
/* Generally when we see PLUS here, it's the function invariant
(plus soft-fp const_int). Which can only be computed into general
regs. */
- if (GET_CODE (x) == PLUS)
+ if (PLUS_P (x))
return reg_class_subset_p (regclass, GENERAL_REGS) ? regclass : NO_REGS;
/* QImode constants are easy to load, but non-constant QImode data
@@ -26296,7 +26296,7 @@ ix86_secondary_reload (bool in_p, rtx x,
else
regno = -1;
- if (regno >= FIRST_PSEUDO_REGISTER || GET_CODE (x) == SUBREG)
+ if (regno >= FIRST_PSEUDO_REGISTER || SUBREG_P (x))
regno = true_regnum (x);
/* Return Q_REGS if the operand is in memory. */
@@ -26925,7 +26925,7 @@ ix86_rtx_costs (rtx x, int code, int out
if (GET_MODE_CLASS (mode) == MODE_INT
&& GET_MODE_BITSIZE (mode) <= GET_MODE_BITSIZE (Pmode))
{
- if (GET_CODE (XEXP (x, 0)) == PLUS
+ if (PLUS_P (XEXP (x, 0))
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT
&& CONST_INT_P (XEXP (XEXP (XEXP (x, 0), 0), 1))
&& CONSTANT_P (XEXP (x, 1)))
@@ -26953,7 +26953,7 @@ ix86_rtx_costs (rtx x, int code, int out
return true;
}
}
- else if (GET_CODE (XEXP (x, 0)) == PLUS)
+ else if (PLUS_P (XEXP (x, 0)))
{
*total = cost->lea;
*total += rtx_cost (XEXP (XEXP (x, 0), 0), outer_code, speed);
@@ -28683,7 +28683,7 @@ ix86_expand_vector_init (bool mmx_ok, rt
{
x = XVECEXP (vals, 0, i);
if (!(CONST_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE
+ || CONST_DOUBLE_P (x)
|| GET_CODE (x) == CONST_FIXED))
n_var++, one_var = i;
else if (x != CONST0_RTX (inner_mode))
@@ -30129,7 +30129,7 @@ ix86_sse5_valid_op_p (rtx operands[], rt
rtx pattern = PATTERN (insn);
/* allow 0 for pcmov */
- if (GET_CODE (pattern) != SET
+ if (!SET_P (pattern)
|| GET_CODE (SET_SRC (pattern)) != IF_THEN_ELSE
|| i < 2
|| operands[i] != CONST0_RTX (mode))
Index: rtl.h
===================================================================
--- rtl.h (revision 148340)
+++ rtl.h (working copy)
@@ -395,6 +395,21 @@ struct GTY(()) rtvec_def {
/* Predicate yielding nonzero iff X is a barrier insn. */
#define BARRIER_P(X) (GET_CODE (X) == BARRIER)
+/* Predicate yielding nonzero iff X is a subreg insn. */
+#define SUBREG_P(X) (GET_CODE (X) == SUBREG)
+
+/* Predicate yielding nonzero iff X is a set insn. */
+#define SET_P(X) (GET_CODE (X) == SET)
+
+/* Predicate yielding nonzero iff X is an rtx for a plus operator */
+#define PLUS_P(X) (GET_CODE (X) == PLUS)
+
+/* Predicate yielding nonzero iff X is a floating point constant. */
+#define CONST_DOUBLE_P(X) (GET_CODE (X) == CONST_DOUBLE)
+
+/* Predicate yielding nonzero iff X is a parallel insn. */
+#define PARALLEL_P(X) (GET_CODE (X) == PARALLEL)
+
/* Predicate yielding nonzero iff X is a data for a jump table. */
#define JUMP_TABLE_DATA_P(INSN) \
(JUMP_P (INSN) && (GET_CODE (PATTERN (INSN)) == ADDR_VEC || \