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Blackfin: Tweak bfin_register_move_cost


We've added a number of register classes over the years, some of them
(e.g. D0REGS, EVEN_DREGS) subsets of DREGS.  This means we can't simply
test a class whether it's equal to DREGS, we have to use regclass_subset_p.

This also removes a hack from bfin_register_move_cost that tried to
model the stalls for moving D registers to P or DAG registers.  This is
a bit dubious anyway, since the scheduler knows about these stalls, and
it caused some problems with other patches I'm carrying.  Removing it
seems to have no adverse effect on code quality from what I've seen in
my tests.

Committed as 146956.


Bernd -- This footer brought to you by insane German lawmakers. Analog Devices GmbH Wilhelm-Wagenfeld-Str. 6 80807 Muenchen Sitz der Gesellschaft Muenchen, Registergericht Muenchen HRB 40368 Geschaeftsfuehrer Thomas Wessel, William A. Martin, Margaret Seif

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 146955)
+++ ChangeLog	(working copy)
@@ -5,6 +5,10 @@
 	Remove special case testing for last insn of inner loops. Don't fail if
 	the loop ends with a jump, emit an extra nop instead.
 
+	* config/bfin/bfin.c (bfin_register_move_cost): Test for subsets of
+	DREGS rather than comparing directly.  Remove code that tries to
+	account for latencies.
+
 2009-04-29  Richard Guenther  <rguenther@suse.de>
 
 	PR tree-optimization/39941
Index: config/bfin/bfin.c
===================================================================
--- config/bfin/bfin.c	(revision 146952)
+++ config/bfin/bfin.c	(working copy)
@@ -2331,20 +2331,14 @@ bfin_register_move_cost (enum machine_mo
 			 enum reg_class class1, enum reg_class class2)
 {
   /* These need secondary reloads, so they're more expensive.  */
-  if ((class1 == CCREGS && class2 != DREGS)
-      || (class1 != DREGS && class2 == CCREGS))
+  if ((class1 == CCREGS && !reg_class_subset_p (class2, DREGS))
+      || (class2 == CCREGS && !reg_class_subset_p (class1, DREGS)))
     return 4;
 
   /* If optimizing for size, always prefer reg-reg over reg-memory moves.  */
   if (optimize_size)
     return 2;
 
-  /* There are some stalls involved when moving from a DREG to a different
-     class reg, and using the value in one of the following instructions.
-     Attempt to model this by slightly discouraging such moves.  */
-  if (class1 == DREGS && class2 != DREGS)
-    return 2 * 2;
-
   if (GET_MODE_CLASS (mode) == MODE_INT)
     {
       /* Discourage trying to use the accumulators.  */

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