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Re: [SH] double precision floating point dwarf fix


Christian BRUEL <christian.bruel@st.com> wrote:
> /* 64 bit floating points memory transfers are loaded as paired single 
> precision loads or store. So DWARF information needs fixing in little 
> endian, (unless PR=SZ=1 in FPSCR).  */

There are a few style issues in this and I've missed that
the copyright years of the files touched should be updated.
I've attached the revised one with also the updated date
of ChangeLog entry, for the record.
Ok for the trunk with that change.  Thanks for your patch!

Regards,
	kaz
--
2009-04-02  Christian Bruel  <christian.bruel@st.com>

	* config/sh/sh.c (sh_dwarf_register_span): New function.
	(TARGET_DWARF_REGISTER_SPAN): Define.
	* config/sh/sh-protos.h (sh_dwarf_register_span): Declare.

diff -uprN ORIG/trunk/gcc/config/sh/sh-protos.h trunk/gcc/config/sh/sh-protos.h
--- ORIG/trunk/gcc/config/sh/sh-protos.h	2008-10-22 09:11:15.000000000 +0900
+++ trunk/gcc/config/sh/sh-protos.h	2009-04-02 18:10:44.000000000 +0900
@@ -1,6 +1,6 @@
 /* Definitions of target machine for GNU compiler for Renesas / SuperH SH.
    Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2003,
-   2004, 2005, 2006, 2007, 2008
+   2004, 2005, 2006, 2007, 2008, 2009
    Free Software Foundation, Inc.
    Contributed by Steve Chamberlain (sac@cygnus.com).
    Improved by Jim Wilson (wilson@cygnus.com).
@@ -160,6 +160,7 @@ extern void sh_function_arg_advance (CUM
 extern int sh_pass_in_reg_p (CUMULATIVE_ARGS *, enum machine_mode, tree);
 extern void sh_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, signed int, enum machine_mode);
 extern bool sh_promote_prototypes (const_tree);
+extern rtx sh_dwarf_register_span (rtx);
 
 extern rtx replace_n_hard_rtx (rtx, rtx *, int , int);
 extern int shmedia_cleanup_truncate (rtx *, void *);
diff -uprN ORIG/trunk/gcc/config/sh/sh.c trunk/gcc/config/sh/sh.c
--- ORIG/trunk/gcc/config/sh/sh.c	2009-03-26 10:11:17.000000000 +0900
+++ trunk/gcc/config/sh/sh.c	2009-04-02 18:12:37.000000000 +0900
@@ -1,6 +1,7 @@
 /* Output routines for GCC for Renesas / SuperH SH.
    Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
-   2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+   2003, 2004, 2005, 2006, 2007, 2008, 2009
+   Free Software Foundation, Inc.
    Contributed by Steve Chamberlain (sac@cygnus.com).
    Improved by Jim Wilson (wilson@cygnus.com).
 
@@ -405,6 +406,9 @@ static int sh2a_function_vector_p (tree)
 #undef TARGET_MACHINE_DEPENDENT_REORG
 #define TARGET_MACHINE_DEPENDENT_REORG sh_reorg
 
+#undef TARGET_DWARF_REGISTER_SPAN
+#define TARGET_DWARF_REGISTER_SPAN sh_dwarf_register_span
+
 #ifdef HAVE_AS_TLS
 #undef TARGET_HAVE_TLS
 #define TARGET_HAVE_TLS true
@@ -7426,6 +7430,27 @@ sh_gimplify_va_arg_expr (tree valist, tr
   return result;
 }
 
+/* 64 bit floating points memory transfers are loaded as paired single 
+   precision loads or store.  So DWARF information needs fixing in little 
+   endian, (unless PR=SZ=1 in FPSCR).  */
+
+rtx
+sh_dwarf_register_span (rtx reg)
+{
+  unsigned regno = REGNO (reg);
+
+  if (WORDS_BIG_ENDIAN || GET_MODE (reg) != DFmode)
+    return NULL_RTX;
+
+  return
+    gen_rtx_PARALLEL (VOIDmode,
+		      gen_rtvec (2,
+				 gen_rtx_REG (SFmode,
+					      DBX_REGISTER_NUMBER (regno+1)),
+				 gen_rtx_REG (SFmode,
+					      DBX_REGISTER_NUMBER (regno))));
+}
+
 bool
 sh_promote_prototypes (const_tree type)
 {


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