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RFC: PATCH: PR rtl-optimization/38272: [4.4 Regression] Revision 142207 caused libgomp.fortran/threadprivate2.f90


IRA triggers a latent reload bug where do_input_reload use a register
spill for a memory input and the spilled register is diffrent from
the register to be reloaded into.  More detailed information is at

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38272

I tested this patch on Linux/ia32, Linux/ia64 and Linux/Intel without
any regressions.  Does it look OK?

Thanks.


H.J.
----
2008-11-28  H.J. Lu  <hongjiu.lu@intel.com>

	PR rtl-optimization/38272
	* reload1.c (do_input_reload): Don't use a spill for memory if it
	is different from the register to be reloaded into.

--- gcc/reload1.c.foo	2008-11-21 06:06:55.000000000 -0800
+++ gcc/reload1.c	2008-11-28 12:56:54.000000000 -0800
@@ -7508,6 +7508,8 @@ do_input_reload (struct insn_chain *chai
       && MEM_P (rl->in)
       && MEM_P (rl->in_reg)
       && reload_spill_index[j] >= 0
+      && (rl->reg_rtx == 0
+	  || REGNO (rl->reg_rtx) == (unsigned int) reload_spill_index[j])
       && TEST_HARD_REG_BIT (reg_reloaded_valid, reload_spill_index[j]))
     rl->in = regno_reg_rtx[reg_reloaded_contents[reload_spill_index[j]]];
 


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