This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: PATCH: Separate processor model from ix86_tune


On Mon, Oct 6, 2008 at 2:04 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> H.J. Lu wrote:
>
>>> 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
>>>
>>>       * config/i386/i386-protos.h (ix86_schedule): New.
>>>
>>>       * config/i386/i386.c (ix86_schedule): New.
>>>       (override_options): Add schedule to processor_alias_table.  Set
>>>       ix86_schedule from the schedule field in processor_alias_table.
>>>       (ix86_function_specific_save): Save ix86_schedule.
>>>       (ix86_function_specific_restore): Restore ix86_schedule.
>>>
>>>       * config/i386/i386.md (cpu): Map to ix86_schedule instead of
>>>       ix86_tune.
>>>
>>>       * config/i386/i386.opt: Add schedule.
>>>
>>>
>>
>> The cpu attributes,  i386, i486, pentium4 and nocona, aren't really
>> used. They exist only to map attr_cpu to processor_type so that
>> CPU_XXX == PROCESSOR_XXX. When we de-couple attr_cpu
>> from processor_type, they aren't needed at all. Since we use
>> CPU_PENTIUMPRO for -mtune=generic32, we can remove
>> CPU_GENERIC32 and use CPU_PENTIUMPRO directly instead.
>> It will make scheduler faster  for -mtune=generic32. OK for trunk?
>>
>
> We can also remove CPU_GENERIC64 and use CPU_K8 directly in the same way.
> From a quick look at athlon.md, it looks to me that generic64 is always used
> together with k8, so generic64 can also be removed from athlon.md scheduling
> description.

K8 and generic64 aren't identical:

(define_insn_reservation "athlon_movlpd_load_k8" 2
                         (and (eq_attr "cpu" "k8")
                              (and (eq_attr "type" "ssemov")
                                   (match_operand:DF 1 "memory_operand" "")))
                         "athlon-direct,athlon-fploadk8,athlon-fstore")
(define_insn_reservation "athlon_movsd_load_generic64" 2
                         (and (eq_attr "cpu" "generic64")
                              (and (eq_attr "type" "ssemov")
                                   (match_operand:DF 1 "memory_operand" "")))

"athlon-double,athlon-fploadk8,(athlon-fstore+athlon-fmul)")

>
> +      {"core2", PROCESSOR_CORE2, CPU_CORE2,
> +    (PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
> +     | PTA_SSSE3 | PTA_CX16)},
>
> IMO, you can remove all "(" and ")" brackets from this structure.

I will do that.

> Please wait for a day for other comments, otherwise the patch is OK with
> these changes.
>

Thanks.


-- 
H.J.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]