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Re: PowerPC -- support single-precision FPU
- From: "David Edelsohn" <dje dot gcc at gmail dot com>
- To: "Michael Eager" <eager at eagercon dot com>
- Cc: "GCC Patches" <gcc-patches at gcc dot gnu dot org>, "Andrew Pinski" <pinskia at gmail dot com>
- Date: Sun, 21 Sep 2008 16:32:34 -0400
- Subject: Re: PowerPC -- support single-precision FPU
>>>>> Michael Eager writes:
>> Should floatsisf2_internal have the same constraints as floatdidf2?
>
> Yes.
>
> The condition for floatsisf2_internal should also be changed to
> "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT && ! TARGET_DOUBLE_FLOAT"
> so that it is only matched for -fsingle-float and not for -fdouble-float
> or classic PowerPC FPU.
The floatsisf2_internal pattern also needs TARGET_POWERPC64 condition.
fcfid only is present
on processors that implement PowerPC64.
Is the floatsisf2_internal pattern even necessary? Is that RTL and
instruction ever generated
for the Xilinx configuration?
The floatsisf2 define_expand pattern has final condition !TARGET_FPRS,
which was intended
for SPE and is false for the Xilinx processor.
Thanks, David