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[PATCH, testsuite]: Committed: Move some tests to better places
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Sat, 13 Sep 2008 15:26:26 +0200
- Subject: [PATCH, testsuite]: Committed: Move some tests to better places
Hello!
This patch moves a bunch of target specific tests to their target
directories. Also, one test in gcc-c.torture was not executed at all,
this patch moves it to "compile" subdirectory.
2008-09-13 Uros Bizjak <ubizjak@gmail.com>
* gcc.c-torture/pr36141.c: Move to ...
* gcc.c-torture/compile/pr36141.c: ... here.
* gcc.dg/arm-g2.c: Move to ...
* gcc.target/arm/g2.c: ... here.
* gcc.dg/arm-vfp1.c: Move to ...
* gcc.target/arm/vfp1.c: ... here.
* gcc.dg/20031108-1: Move to ...
* gcc.target/arm/20031108-1.c: ... here.
* gcc.dg/20030909-1: Move to ...
* gcc.target/arm/20030909-1.c: ... here.
* gcc.dg/arm-mmx-1.c: Move to ...
* gcc.target/arm/mmx-1.c: ... here.
* gcc.dg/arm-scd[123].c: Move to ...
* gcc.target/arm/scd[123].c: ... here.
* gcc.dg/arm-asm.c: Move to ...
* gcc.target/arm/asm.c: ... here.
* gcc.dg/20080410-1: Move to ...
* gcc.target/sh/20080410-1.c: ... here.
* gcc.dg/globalreg-1.c: Move to ...
* gcc.target/sparc/globalreg-1.c: ... here.
Patch was committed to SVN as obvious.
Uros.
Index: gcc.c-torture/pr36141.c
===================================================================
--- gcc.c-torture/pr36141.c (revision 140338)
+++ gcc.c-torture/pr36141.c (working copy)
@@ -1,17 +0,0 @@
-extern void ffi_closure_unix (void);
-ffi_prep_closure_loc (void)
-{
- struct ia64_fd
- {
- unsigned long long code_pointer;
- unsigned long long gp;
- };
- struct ffi_ia64_trampoline_struct
- {
- unsigned long long code_pointer;
- };
- struct ffi_ia64_trampoline_struct *tramp;
- struct ia64_fd *fd;
- fd = (struct ia64_fd *)(void *)ffi_closure_unix;
- tramp->code_pointer = fd->code_pointer;
-}
Index: gcc.target/arm/20030909-1.c
===================================================================
--- gcc.target/arm/20030909-1.c (revision 140338)
+++ gcc.target/arm/20030909-1.c (working copy)
@@ -1,5 +1,5 @@
/* Verify that ands are combined. */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
/* { dg-options "-O" } */
/* { dg-final { scan-assembler-not "#255.*#255" } } */
int f(int a, int b) { return ((a & 0xff) + (b & 0xff)) & 0xff; }
Index: gcc.target/arm/scd42-1.c
===================================================================
--- gcc.target/arm/scd42-1.c (revision 140338)
+++ gcc.target/arm/scd42-1.c (working copy)
@@ -1,5 +1,5 @@
/* Verify that mov is preferred on XScale for loading a 1 byte constant. */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
/* { dg-options "-mcpu=xscale -O" } */
unsigned load1(void) __attribute__ ((naked));
Index: gcc.target/arm/scd42-3.c
===================================================================
--- gcc.target/arm/scd42-3.c (revision 140338)
+++ gcc.target/arm/scd42-3.c (working copy)
@@ -1,5 +1,5 @@
/* Verify that ldr is preferred on XScale for loading a 3 or 4 byte constant. */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
/* { dg-options "-mcpu=xscale -O" } */
unsigned load4(void) __attribute__ ((naked));
Index: gcc.target/arm/asm.c
===================================================================
--- gcc.target/arm/asm.c (revision 140338)
+++ gcc.target/arm/asm.c (working copy)
@@ -1,6 +1,6 @@
/* ARM and Thumb asm statements should be able to access the constant
pool. */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
extern unsigned x[];
unsigned *trapTable()
{
Index: gcc.target/arm/20031108-1.c
===================================================================
--- gcc.target/arm/20031108-1.c (revision 140338)
+++ gcc.target/arm/20031108-1.c (working copy)
@@ -1,5 +1,5 @@
/* PR optimization/10467 */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
/* { dg-options "-O2 -mthumb" } */
typedef enum {Ident_1} Enumeration;
Index: gcc.target/arm/20051215-1.c
===================================================================
--- gcc.target/arm/20051215-1.c (revision 140338)
+++ gcc.target/arm/20051215-1.c (working copy)
@@ -1,7 +1,7 @@
/* ARM's load-and-call patterns used to allow automodified addresses.
This was wrong, because if the modified register were spilled,
the call would need an output reload. */
-/* { dg-do run { target arm*-*-* } } */
+/* { dg-do run } */
/* { dg-options "-O2 -fno-omit-frame-pointer" } */
extern void abort (void);
typedef void (*callback) (void);
Index: gcc.target/sparc/globalreg-1.c
===================================================================
--- gcc.target/sparc/globalreg-1.c (revision 140338)
+++ gcc.target/sparc/globalreg-1.c (working copy)
@@ -1,4 +1,4 @@
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run } */
/* { dg-options "-std=gnu99 -Os" } */
/* This is a massively distilled test case based upon
Index: gcc.dg/arm-g2.c
===================================================================
--- gcc.dg/arm-g2.c (revision 140338)
+++ gcc.dg/arm-g2.c (working copy)
@@ -1,20 +0,0 @@
-/* Verify that hardware multiply is preferred on XScale. */
-/* { dg-do compile } */
-/* { dg-options "-mcpu=xscale -O2" } */
-/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
-/* { dg-require-effective-target arm32 } */
-
-/* Brett Gaines' test case. */
-unsigned BCPL(unsigned) __attribute__ ((naked));
-unsigned BCPL(unsigned seed)
-{
- /* Best code would be:
- ldr r1, =2147001325
- ldr r2, =715136305
- mla r0, r1, r0, r2
- mov pc, lr */
-
- return seed * 2147001325U + 715136305U;
-}
-
-/* { dg-final { scan-assembler "mla\[ ].*" } } */
Index: gcc.dg/arm-vfp1.c
===================================================================
--- gcc.dg/arm-vfp1.c (revision 140338)
+++ gcc.dg/arm-vfp1.c (working copy)
@@ -1,127 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
-/* { dg-require-effective-target arm_vfp_ok } */
-
-extern float fabsf (float);
-extern float sqrtf (float);
-extern double fabs (double);
-extern double sqrt (double);
-
-volatile float f1, f2, f3;
-
-void test_sf() {
- /* abssf2_vfp */
- /* { dg-final { scan-assembler "fabss" } } */
- f1 = fabsf (f1);
- /* negsf2_vfp */
- /* { dg-final { scan-assembler "fnegs" } } */
- f1 = -f1;
- /* addsf3_vfp */
- /* { dg-final { scan-assembler "fadds" } } */
- f1 = f2 + f3;
- /* subsf3_vfp */
- /* { dg-final { scan-assembler "fsubs" } } */
- f1 = f2 - f3;
- /* divsf3_vfp */
- /* { dg-final { scan-assembler "fdivs" } } */
- f1 = f2 / f3;
- /* mulsf3_vfp */
- /* { dg-final { scan-assembler "fmuls" } } */
- f1 = f2 * f3;
- /* mulsf3negsf_vfp */
- /* { dg-final { scan-assembler "fnmuls" } } */
- f1 = -f2 * f3;
- /* mulsf3addsf_vfp */
- /* { dg-final { scan-assembler "fmacs" } } */
- f1 = f2 * f3 + f1;
- /* mulsf3subsf_vfp */
- /* { dg-final { scan-assembler "fmscs" } } */
- f1 = f2 * f3 - f1;
- /* mulsf3negsfaddsf_vfp */
- /* { dg-final { scan-assembler "fnmacs" } } */
- f1 = f2 - f3 * f1;
- /* mulsf3negsfsubsf_vfp */
- /* { dg-final { scan-assembler "fnmscs" } } */
- f1 = -f2 * f3 - f1;
- /* sqrtsf2_vfp */
- /* { dg-final { scan-assembler "fsqrts" } } */
- f1 = sqrtf (f1);
-}
-
-volatile double d1, d2, d3;
-
-void test_df() {
- /* absdf2_vfp */
- /* { dg-final { scan-assembler "fabsd" } } */
- d1 = fabs (d1);
- /* negdf2_vfp */
- /* { dg-final { scan-assembler "fnegd" } } */
- d1 = -d1;
- /* adddf3_vfp */
- /* { dg-final { scan-assembler "faddd" } } */
- d1 = d2 + d3;
- /* subdf3_vfp */
- /* { dg-final { scan-assembler "fsubd" } } */
- d1 = d2 - d3;
- /* divdf3_vfp */
- /* { dg-final { scan-assembler "fdivd" } } */
- d1 = d2 / d3;
- /* muldf3_vfp */
- /* { dg-final { scan-assembler "fmuld" } } */
- d1 = d2 * d3;
- /* muldf3negdf_vfp */
- /* { dg-final { scan-assembler "fnmuld" } } */
- d1 = -d2 * d3;
- /* muldf3adddf_vfp */
- /* { dg-final { scan-assembler "fmacd" } } */
- d1 = d2 * d3 + d1;
- /* muldf3subdf_vfp */
- /* { dg-final { scan-assembler "fmscd" } } */
- d1 = d2 * d3 - d1;
- /* muldf3negdfadddf_vfp */
- /* { dg-final { scan-assembler "fnmacd" } } */
- d1 = d2 - d3 * d1;
- /* muldf3negdfsubdf_vfp */
- /* { dg-final { scan-assembler "fnmscd" } } */
- d1 = -d2 * d3 - d1;
- /* sqrtdf2_vfp */
- /* { dg-final { scan-assembler "fsqrtd" } } */
- d1 = sqrt (d1);
-}
-
-volatile int i1;
-volatile unsigned int u1;
-
-void test_convert () {
- /* extendsfdf2_vfp */
- /* { dg-final { scan-assembler "fcvtds" } } */
- d1 = f1;
- /* truncdfsf2_vfp */
- /* { dg-final { scan-assembler "fcvtsd" } } */
- f1 = d1;
- /* truncsisf2_vfp */
- /* { dg-final { scan-assembler "ftosizs" } } */
- i1 = f1;
- /* truncsidf2_vfp */
- /* { dg-final { scan-assembler "ftosizd" } } */
- i1 = d1;
- /* fixuns_truncsfsi2 */
- /* { dg-final { scan-assembler "ftouizs" } } */
- u1 = f1;
- /* fixuns_truncdfsi2 */
- /* { dg-final { scan-assembler "ftouizd" } } */
- u1 = d1;
- /* floatsisf2_vfp */
- /* { dg-final { scan-assembler "fsitos" } } */
- f1 = i1;
- /* floatsidf2_vfp */
- /* { dg-final { scan-assembler "fsitod" } } */
- d1 = i1;
- /* floatunssisf2 */
- /* { dg-final { scan-assembler "fuitos" } } */
- f1 = u1;
- /* floatunssidf2 */
- /* { dg-final { scan-assembler "fuitod" } } */
- d1 = u1;
-}
-
Index: gcc.dg/20031108-1.c
===================================================================
--- gcc.dg/20031108-1.c (revision 140338)
+++ gcc.dg/20031108-1.c (working copy)
@@ -1,35 +0,0 @@
-/* PR optimization/10467 */
-/* { dg-do compile { target arm*-*-* } } */
-/* { dg-options "-O2 -mthumb" } */
-
-typedef enum {Ident_1} Enumeration;
-
-typedef struct record
-{
- struct record *Ptr_Comp;
- Enumeration Discr;
- union {
- struct {
- Enumeration Enum_Comp;
- int Int_Comp;
- char Str_Comp [31];
- } var_1;
- } variant;
-} *Rec_Pointer;
-
-Rec_Pointer Ptr_Glob;
-
-Proc_1 (Ptr_Val_Par)
- Rec_Pointer Ptr_Val_Par;
-{
- Rec_Pointer Next_Record = Ptr_Val_Par->Ptr_Comp;
-
- *Ptr_Val_Par->Ptr_Comp = *Ptr_Glob;
-
- if (Next_Record->Discr == Ident_1)
- {
- Proc_7 (Next_Record->variant.var_1.Int_Comp, 10,
- &Next_Record->variant.var_1.Int_Comp);
- }
-}
-
Index: gcc.dg/arm-mmx-1.c
===================================================================
--- gcc.dg/arm-mmx-1.c (revision 140338)
+++ gcc.dg/arm-mmx-1.c (working copy)
@@ -1,24 +0,0 @@
-/* Verify that if IP is saved to ensure stack alignment, we don't load
- it into sp. */
-/* { dg-do compile } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mfloat-abi=softfp" } { "" } } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */
-/* { dg-options "-O -mno-apcs-frame -mcpu=iwmmxt -mabi=iwmmxt" } */
-/* { dg-require-effective-target arm32 } */
-/* { dg-final { scan-assembler "ldmfd\[ ]sp!.*ip,\[ ]*pc" } } */
-
-/* This function uses all the call-saved registers, namely r4, r5, r6,
- r7, r8, r9, sl, fp. Since we also save lr, that leaves an odd
- number of registers, and the compiler will push ip to align the
- stack. Make sure that we restore ip into ip, not into sp as is
- done when using a frame pointer. The -mno-apcs-frame option
- permits the frame pointer to be used as an ordinary register. */
-
-void
-foo(void)
-{
- __asm volatile ("" : : :
- "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "lr");
-}
Index: gcc.dg/arm-scd42-2.c
===================================================================
--- gcc.dg/arm-scd42-2.c (revision 140338)
+++ gcc.dg/arm-scd42-2.c (working copy)
@@ -1,18 +0,0 @@
-/* Verify that mov is preferred on XScale for loading a 2 byte constant. */
-/* { dg-do compile } */
-/* { dg-options "-mcpu=xscale -O" } */
-/* { dg-skip-if "Test is specific to the Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
-/* { dg-require-effective-target arm32 } */
-
-unsigned load2(void) __attribute__ ((naked));
-unsigned load2(void)
-{
- /* Best code would be:
- mov r0, =272
- add r0, r0, =1
- mov pc, lr */
-
- return 273;
-}
-
-/* { dg-final { scan-assembler "mov\[ ].*272" } } */
Index: gcc.dg/20030909-1.c
===================================================================
--- gcc.dg/20030909-1.c (revision 140338)
+++ gcc.dg/20030909-1.c (working copy)
@@ -1,5 +0,0 @@
-/* Verify that ands are combined. */
-/* { dg-do compile { target arm*-*-* } } */
-/* { dg-options "-O" } */
-/* { dg-final { scan-assembler-not "#255.*#255" } } */
-int f(int a, int b) { return ((a & 0xff) + (b & 0xff)) & 0xff; }
Index: gcc.dg/globalreg-1.c
===================================================================
--- gcc.dg/globalreg-1.c (revision 140338)
+++ gcc.dg/globalreg-1.c (working copy)
@@ -1,54 +0,0 @@
-/* { dg-do run { target sparc*-*-* } } */
-/* { dg-options "-std=gnu99 -Os" } */
-
-/* This is a massively distilled test case based upon
- mm/memory.c:unmap_vmas() in the Linux kernel when compiled
- on sparc64 for SMP which uses a global register as the
- base of the per-cpu variable area.
-
- Because of a bug in global register handling in the dataflow
- code, the loop-invariant pass would move 'expression(regval)'
- outside of the loop. */
-
-extern void exit(int);
-extern void abort(void);
-
-register unsigned long regval __asm__("g6");
-
-extern void cond_resched(void);
-
-unsigned int var;
-
-static unsigned long expression(unsigned long v)
-{
- unsigned long ret;
-
- __asm__("" : "=r" (ret) : "0" (0));
- return ret + v;
-}
-
-void func(unsigned long *pp)
-{
- int i;
-
- for (i = 0; i < 56; i++) {
- cond_resched();
- *pp = expression(regval);
- }
-}
-
-void __attribute__((noinline)) cond_resched(void)
-{
- regval++;
-}
-
-int main(void)
-{
- unsigned long val;
-
- regval = 100;
- func(&val);
- if (val != 156)
- abort();
- exit(0);
-}
Index: gcc.dg/20080410-1.c
===================================================================
--- gcc.dg/20080410-1.c (revision 140338)
+++ gcc.dg/20080410-1.c (working copy)
@@ -1,28 +0,0 @@
-/* { dg-do compile { target "sh-*-*" } } */
-/* { dg-options "-O0 -m4 -ml -fira" } */
-/* { dg-final { scan-assembler-not "add\tr0,r0" } } */
-
-/* This test checks that chain reloads conflict. I they don't
- conflict, the same hard register R0 is used for the both reloads
- but in this case the second reload needs an intermediate register
- (which is the reload register). As the result we have the
- following code
-
- mov #4,r0 -- first reload
- mov r14,r0 -- second reload
- add r0,r0 -- second reload
-
- The right code should be
-
- mov #4,r0 -- first reload
- mov r14,r1 -- second reload
- add r0,r1 -- second reload
-
-*/
-
-_Complex float foo_float ();
-
-void bar_float ()
-{
- __real foo_float ();
-}
Index: gcc.dg/arm-scd42-1.c
===================================================================
--- gcc.dg/arm-scd42-1.c (revision 140338)
+++ gcc.dg/arm-scd42-1.c (working copy)
@@ -1,15 +0,0 @@
-/* Verify that mov is preferred on XScale for loading a 1 byte constant. */
-/* { dg-do compile { target arm*-*-* } } */
-/* { dg-options "-mcpu=xscale -O" } */
-
-unsigned load1(void) __attribute__ ((naked));
-unsigned load1(void)
-{
- /* Best code would be:
- mov r0, =17
- mov pc, lr */
-
- return 17;
-}
-
-/* { dg-final { scan-assembler "mov\[ ].*17" } } */
Index: gcc.dg/arm-asm.c
===================================================================
--- gcc.dg/arm-asm.c (revision 140338)
+++ gcc.dg/arm-asm.c (working copy)
@@ -1,13 +0,0 @@
-/* ARM and Thumb asm statements should be able to access the constant
- pool. */
-/* { dg-do compile { target arm*-*-* } } */
-extern unsigned x[];
-unsigned *trapTable()
-{
- unsigned *i;
-
- __asm__ volatile("ldr %0,%1" : "=r"(i) : "m"(x[0]));
-
- return i;
-}
-
Index: gcc.dg/arm-scd42-3.c
===================================================================
--- gcc.dg/arm-scd42-3.c (revision 140338)
+++ gcc.dg/arm-scd42-3.c (working copy)
@@ -1,15 +0,0 @@
-/* Verify that ldr is preferred on XScale for loading a 3 or 4 byte constant. */
-/* { dg-do compile { target arm*-*-* } } */
-/* { dg-options "-mcpu=xscale -O" } */
-
-unsigned load4(void) __attribute__ ((naked));
-unsigned load4(void)
-{
- /* Best code would be:
- ldr r0, =65809
- mov pc, lr */
-
- return 65809;
-}
-
-/* { dg-final { scan-assembler "ldr\[ ].*" } } */