This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: Remove some of optimize_size checks in i386 backend
Hi,
I don't have much time to look into code curefully, but I believe this
is safe:
>
> >It is just post-reload pattern, so I think we are safe here.
>
> I don't think so, because:
>
> 1) you can have a non-cached recog in eliminate_regs_in_insn. That
> recog will change the code of the insn and xor will always be emitted.
The separate xor patterns exists because xor needs flags register.
All loads of 0 before peephole2 are emit as mov pattern not clobbering
flags so recog will chose the non-xor variant independently on the
patterns with extra clobbers.
There is peephole2 pattern that translates them to the
xors/ors. So even if the pattern is enabled but the peephole is not
happening, we still should emit mov0 correctly.
>
> 2) new instructions generated after reload will always be emitted as
> xors. it can happen in reload_combine, for example.
We never output those directly, I believe.
Honza
>
> Paolo