This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH, i386]: Emit fused compare-and-branch instructions for core2
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 19 Jun 2008 19:28:42 +0200
- Subject: Re: [PATCH, i386]: Emit fused compare-and-branch instructions for core2
- References: <48596A90.7000102@gmail.com>
Hello!
2008-06-18 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.h (ix86_tune_indices)
[X86_TUNE_FUSE_CMP_AND_BRANCH]: New.
(TARGET_FUSE_CMP_AND_BRANCH): New define.
* config/i386/i386.md (*jcc_fused_1): New insn pattern
(*jcc_fused_2): Ditto.
* config/i386/i386.c (ix86_tune_features): Add m_CORE2 to
X86_TUNE_USE_VECTOR_COMPARES targets.
(print operand): Handle 'E' and 'e' code.
The patch was bootstrapped and regression tested on
x86_64-pc-linux-gnu with -m32/-mtune=core2. I'll wait a couple of days
for possible comments before this patch is committed to SVN.
I have committed the patch with a small follow-up that substituted "#"
in asm template with ASM_COMMENT_START definition.
BTW: It has been pointed out that Nehalem processor will also fuse
macro-ops in 64bit mode, including all missing compares. Since this will
be a new architecture, this target will probably have its own
"-march/-mtune" switch, and correct constraint will be added for this
particular target.
Uros.
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 136954)
+++ config/i386/i386.md (working copy)
@@ -14052,7 +14052,7 @@
else
output_asm_insn ("cmp{l}\t{%3, %2|%2, %3}",operands);
- return "%+j%E1\t%l0\t# fused";
+ return "%+j%E1\t%l0\t" ASM_COMMENT_START " fused";
}
[(set_attr "type" "multi")
(set_attr "mode" "SI")])
@@ -14073,7 +14073,7 @@
else
output_asm_insn ("cmp{l}\t{%3, %2|%2, %3}",operands);
- return "%+j%e1\t%l0\t# fused";
+ return "%+j%e1\t%l0\t" ASM_COMMENT_START " fused";
}
[(set_attr "type" "multi")
(set_attr "mode" "SI")])