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Re: [PATCH, MIPS] Add widening version of scc patterns
Richard Sandiford writes:
> ;; A copy of GPR that can be used when a pattern has two independent
> ;; modes.
> (define_mode_iterator GPR2 [SI (DI "TARGET_64BIT")])
> ...
> (define_insn "*seq_<GPR2:mode><GPR:mode>"
> [(set (match_operand:GPR2 0 "register_operand" "=d")
> (eq:GPR2 (match_operand:GPR 1 "register_operand" "d")
> (const_int 0)))]
> "!TARGET_MIPS16"
> "sltu\t%0,%1,1"
> [(set_attr "type" "slt")
> (set_attr "mode" "<GPR:mode>")])
I actually had this version of the patch as well :). And I obviously liked it
better too because of the single template but I couldn't justify the
additional pattern. Anyway I am glad you prefer this solution.
> I'm certainly not going to ask you to make gcc generate the subregless
> version. My point is simply that the narrowing versions are potentially
> useful too.
In my version of the patch I also changed the expander in mips_expand_scc to
emit DI comparisons without the subreg using the new narrowing pattern:
(set (reg:SI 1) (lt:SI (reg:DI 2) (reg:DI 3)))
With that I had no assembly difference on gcc .i files compared to the patch I
sent yesterday.
I guess I just go back to that version of the patch and test it.
Adam