Re: [PATCH, MIPS] Add widening version of scc patterns

[Richard Sandiford <rsandifo at nildram dot co dot uk>]

Hi Adam,

Thanks for the patch, and good catch.

Adam Nemet <anemet@caviumnetworks.com> writes:
> As rtl.texi says, the mode of the comparison operation is independent of the
> mode of the data being compared.  This patch adds DI <- cond:SI patterns to
> optimize away the extensions we currently generate.
>
> I was initially considering providing the "narrowing" version as well but as
> it turns that's not necessary.  Since the expanders set the destination always
> in SI mode we get that for free.  Or with RTL:
>
>   (set (subreg:DI (reg:SI 1) 0) (lt:DI ...))

I take your point, but it'd still be nice to avoid the subreg if possible.
It's generally easier to optimize:

  (set (reg:SI 1) (lt:SI ...))

I'm certainly not going to ask you to make gcc generate the subregless
version.  My point is simply that the narrowing versions are potentially
useful too.  I'd therefore like to avoid the cut-&-paste and simply have:

;; A copy of GPR that can be used when a pattern has two independent
;; modes.
(define_mode_iterator GPR2 [SI (DI "TARGET_64BIT")])
...
(define_insn "*seq_<GPR2:mode><GPR:mode>"
  [(set (match_operand:GPR2 0 "register_operand" "=d")
	(eq:GPR2 (match_operand:GPR 1 "register_operand" "d")
		 (const_int 0)))]
  "!TARGET_MIPS16"
  "sltu\t%0,%1,1"
  [(set_attr "type" "slt")
   (set_attr "mode" "<GPR:mode>")])

etc.  (Untested.)

Richard