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Re: [PATCH] Detect L2 cache size for x86


Your ChangeLog entry doesn't document what you changed. Can you rename
decode_l2_caches_amd to decode_l2_caches since it isn't AMD specific?

Thanks.


H.J.
On Thu, Apr 3, 2008 at 10:11 PM, Zuxy Meng <zuxy.meng@gmail.com> wrote:
> Hi,
>
>  2008/4/4, Uros Bizjak <ubizjak@gmail.com>:
>
>
> > Hello!
>  >
>  > > > >>    The attached patch detects automatically the L2 cache size of a >>
>  > >> host
>  > > >> >> x86
>  > > >> >>    CPU, following what has already been done for L1 cache. Two
>  > schemes
>  > > >> >> are
>  > > >> >>    utilized in the detection: AMD CPUs will use CPUID function
>  > > >> 0x80000006, and
>  > > >> >>    Intel CPUs will try both CPUID function 0x2 and 0x80000006.
>  > > >> CPUID function
>  > > >> >>    0x2 is a bit complex to decode and IMHO Intel is unlikely to >>
>  > >> abandon
>  > > >> >>    function 0x80000006 for its future products. By trying both for
>  > > >> Intel we can
>  > > >> >>    avoid adding more L2 cache descriptors to the decoding function.
>  > > >>
>  > > >> > Ping...
>  > > >>
>  > > >> -ENOCHANGELOG, -ENOTESTINFO.
>  > > >>
>  > > >
>  > > >
>  > > >        *config/i386/driver-i386.c: Add runtime L2 cache size detection
>  > > >
>  > > > Patch is bootstrapped and tested on i386-pc-mingw32.
>  > >
>  > > Ping....
>  > >
>  >
>  > Uh, I was under impression that the patch was already approved.
>  >
>  > The patch is OK for mainline.
>
>  Thanks! Could someone apply it please?
>
>  --
>  Zuxy
>  Beauty is truth,
>  While truth is beauty.
>  PGP KeyID: E8555ED6
>


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