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[RFA] fixing SSSE3 pmaddubsw description


Working on IRA regressions I found a bug which occurs only on IRA
branch.  The reason of the bug is a wrong descriptions of SSSE3
pmaddubsw insn which permits to exchange operands by the reload.  It
is described as commutative operation but it is not.  The insn is
defined as

[a0 a1 ...] pmaddubsw [b0 b1 ...] = [satsw(a0b0+a1b1) satsw(a2b2+a3b3) ...]

where satsw is a saturation to sign value, ax is zero extended and bx
is sign extended.  If signed extension of ax gives a negative value
and bx does not, the result will be different if a and b are
exchanged.  So

a pmaddubsw b != b pmaddubsw a

Here the patch fixing the bug. Is it ok to commit into the mainline?

I failed create a test which exposes the bug on the mainline.
It is only exposed on IRA branch (test gcc.target/i386/ssse3-pmaddubsw.c).

2008-03-10 Vladimir Makarov <vmakarov@redhat.com>

	* config/i386/sse.md (ssse3_pmaddubswv8hi3, ssse3_pmaddubswv4hi3):
	Remove commutativity hint.



Index: config/i386/sse.md
===================================================================
--- config/i386/sse.md	(revision 133076)
+++ config/i386/sse.md	(working copy)
@@ -5960,25 +5960,25 @@
   "TARGET_SSSE3"
   "phsubsw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
 (define_insn "ssse3_pmaddubswv8hi3"
   [(set (match_operand:V8HI 0 "register_operand" "=x")
 	(ss_plus:V8HI
 	  (mult:V8HI
 	    (zero_extend:V8HI
 	      (vec_select:V4QI
-		(match_operand:V16QI 1 "nonimmediate_operand" "%0")
+		(match_operand:V16QI 1 "nonimmediate_operand" "0")
 		(parallel [(const_int 0)
 			   (const_int 2)
 			   (const_int 4)
 			   (const_int 6)
 			   (const_int 8)
 			   (const_int 10)
 			   (const_int 12)
 			   (const_int 14)])))
 	    (sign_extend:V8HI
 	      (vec_select:V8QI
 		(match_operand:V16QI 2 "nonimmediate_operand" "xm")
 		(parallel [(const_int 0)
@@ -6014,25 +6014,25 @@
   "pmaddubsw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "TI")])
 
 (define_insn "ssse3_pmaddubswv4hi3"
   [(set (match_operand:V4HI 0 "register_operand" "=y")
 	(ss_plus:V4HI
 	  (mult:V4HI
 	    (zero_extend:V4HI
 	      (vec_select:V4QI
-		(match_operand:V8QI 1 "nonimmediate_operand" "%0")
+		(match_operand:V8QI 1 "nonimmediate_operand" "0")
 		(parallel [(const_int 0)
 			   (const_int 2)
 			   (const_int 4)
 			   (const_int 6)])))
 	    (sign_extend:V4HI
 	      (vec_select:V4QI
 		(match_operand:V8QI 2 "nonimmediate_operand" "ym")
 		(parallel [(const_int 0)
 			   (const_int 2)
 			   (const_int 4)
 			   (const_int 6)]))))
 	  (mult:V4HI

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