This is the mail archive of the
mailing list for the GCC project.
Re: [PATCH][i386] Fix PR 6585 redundant movl instructions
- From: Paolo Bonzini <bonzini at gnu dot org>
- To: gcc-patches at gcc dot gnu dot org
- Date: Wed, 19 Dec 2007 22:46:50 +0100
- Subject: Re: [PATCH][i386] Fix PR 6585 redundant movl instructions
- References: <20071219205705.GI17368@sygehus.dk>
It records a conflict between register 61 and 66 and ends up allocating
register 61 to (%esi:%ebx) where we would prefer (%edx:%eax). This patch
fixes it by splitting the DImode destination into two SImode parts before
register allocation, which allows the second subreg lowering pass to replace
the subregs with plain SImode regs which the register allocator can handle.
A few hours ago I've attached to PR17236 a patch which obtains the same
result in a target-independent way. I'm currently bootstrapping and
SPEC-testing the patch; I'll let target and middle-end maintainers judge
which approach to prefer. Yours has the obvious advantage of being
localized to the i386 backend (mine touches three passes, local-alloc,
regclass and combine...).