[PATCH, i386]: Committed: Fix PR target/33369 (target part): [4.3 Regression] suffix or operands invalid for `pslld'

["Uros Bizjak" <ubizjak at gmail dot com>]

Hello!

This is in fact the problem, exposed by new SLP pass that doesn't
check target optabs if vec shift by vec constant is supported (this is
the same problem as was fixed for PR target/22480 for loop
vectorizer.).

Attached patch fixes target part of the failure by constraint
immediate operand with 'N' constraint.

Additionally, the mode of op1 operand is changed to SImode for two reasons:

1) code for a[i] << x, where x is integer is much better. For this
testcase from pr22480:

--cut here--
void
test_2 (int a)
{
  static unsigned int bm[16];
  int j;
  for (j = 0; j < 16; j++)
    bm[j] <<= a;
}
--cut here--

gcc generated

test_2:
        subl    $28, %esp
        xorl    %eax, %eax
        movl    32(%esp), %edx
        .p2align 4,,7
        .p2align 3
.L7:
        movl    %edx, (%esp)
        movdqa  bm.1472(%eax), %xmm0
        movl    $0, 4(%esp)
        movl    $0, 8(%esp)
        movl    $0, 12(%esp)
        movdqa  (%esp), %xmm1
        pslld   %xmm1, %xmm0
        movdqa  %xmm0, bm.1472(%eax)

but with attached patch, gcc generates:

test_2:
        movl    $bm.1473, %eax
        movd    4(%esp), %xmm1
        .p2align 4,,7
        .p2align 3
.L7:
        movdqa  (%eax), %xmm0
        pslld   %xmm1, %xmm0
        movdqa  %xmm0, (%eax)

2. gcc will always crash for (unsupported) vec shift by vec constant.
Currently, for attached testcase (ICEs because of SLP pass), SLP pass
produces:

  vect_var_.29_48 = vect_var_.28_46 << vect_cst_.30_47;

Which is just plain wrong for SSE. This is also the reason for new failure

FAIL: gcc.dg/vect/slp-36.c (internal compiler error)
FAIL: gcc.dg/vect/slp-36.c (test for excess errors)


Patch was bootstrapped and regression tested on i686-pc-linux-gnu.
Patch is commited to SVN.

2007-09-10  Uros Bizjak  <ubizjak@gmail.com>

	PR target/33369
	* gcc/config/i386/sse.md (ashr<mode>3): Change op2 mode to SImode.
	Use 'N' operand constraint for op2.
	(lshr<mode>3): Ditto.
	(ashl<mode>3): Ditto.
	(vec_shl_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.
	(vec_shr_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.

	* gcc/config/i386/i386.c (ix86_expand_builtin) [IX86_BUILTIN_PSLL?128,
	IX86_BUILTIN_PSRA*?128, IX86_BUILTIN_PSRL?128]: Convert op1 to SImode.

Uros.

Attachment: pr33369.diff.txt
Description: Text document