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[Committed] S/390: Make alc patterns canonical
- From: "Andreas Krebbel" <Andreas dot Krebbel at de dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Ulrich dot Weigand at de dot ibm dot com
- Date: Thu, 30 Aug 2007 09:00:27 +0200
- Subject: [Committed] S/390: Make alc patterns canonical
Hello,
the insn patterns we are using in the S/390 back end aren't canonical
rtl. The comparison result should be the first PLUS operand. This is
a problem when combine generates add with carry patterns.
Ulrich found that patch on his harddisk. I've just tested it on
latest mainline for him.
Bootstrapped on s390 and s390x.
No testsuite regressions.
Bye,
-Andreas-
2007-08-30 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
* config/s390/s390.c (s390_expand_addcc): Emit canonical alc
pattern.
* config/s390/s390.md ("*add<mode>3_alc_cc", "*add<mode>3_alc",
"addti3", "*adddi3_31z", "*scond<mode>"): Make alc pattern canonical.
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig 2007-08-28 17:08:15.000000000 +0200
--- gcc/config/s390/s390.c 2007-08-28 17:10:34.000000000 +0200
*************** s390_expand_addcc (enum rtx_code cmp_cod
*** 3927,3934 ****
if (!register_operand (src, GET_MODE (dst)))
src = force_reg (GET_MODE (dst), src);
! src = gen_rtx_PLUS (GET_MODE (dst), src, const0_rtx);
! op_res = gen_rtx_PLUS (GET_MODE (dst), src, op_res);
}
p = rtvec_alloc (2);
--- 3927,3934 ----
if (!register_operand (src, GET_MODE (dst)))
src = force_reg (GET_MODE (dst), src);
! op_res = gen_rtx_PLUS (GET_MODE (dst), op_res, src);
! op_res = gen_rtx_PLUS (GET_MODE (dst), op_res, const0_rtx);
}
p = rtvec_alloc (2);
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig 2007-08-28 17:08:15.000000000 +0200
--- gcc/config/s390/s390.md 2007-08-29 10:38:38.000000000 +0200
***************
*** 3635,3642 ****
(match_dup 7)))
(set (match_dup 6) (plus:DI (match_dup 7) (match_dup 8)))])
(parallel
! [(set (match_dup 3) (plus:DI (plus:DI (match_dup 4) (match_dup 5))
! (ltu:DI (reg:CCL1 CC_REGNUM) (const_int 0))))
(clobber (reg:CC CC_REGNUM))])]
"operands[3] = operand_subword (operands[0], 0, 0, TImode);
operands[4] = operand_subword (operands[1], 0, 0, TImode);
--- 3635,3643 ----
(match_dup 7)))
(set (match_dup 6) (plus:DI (match_dup 7) (match_dup 8)))])
(parallel
! [(set (match_dup 3) (plus:DI
! (plus:DI (ltu:DI (reg:CCL1 CC_REGNUM) (const_int 0))
! (match_dup 4)) (match_dup 5)))
(clobber (reg:CC CC_REGNUM))])]
"operands[3] = operand_subword (operands[0], 0, 0, TImode);
operands[4] = operand_subword (operands[1], 0, 0, TImode);
***************
*** 3719,3726 ****
(match_dup 7)))
(set (match_dup 6) (plus:SI (match_dup 7) (match_dup 8)))])
(parallel
! [(set (match_dup 3) (plus:SI (plus:SI (match_dup 4) (match_dup 5))
! (ltu:SI (reg:CCL1 CC_REGNUM) (const_int 0))))
(clobber (reg:CC CC_REGNUM))])]
"operands[3] = operand_subword (operands[0], 0, 0, DImode);
operands[4] = operand_subword (operands[1], 0, 0, DImode);
--- 3720,3728 ----
(match_dup 7)))
(set (match_dup 6) (plus:SI (match_dup 7) (match_dup 8)))])
(parallel
! [(set (match_dup 3) (plus:SI
! (plus:SI (ltu:SI (reg:CCL1 CC_REGNUM) (const_int 0))
! (match_dup 4)) (match_dup 5)))
(clobber (reg:CC CC_REGNUM))])]
"operands[3] = operand_subword (operands[0], 0, 0, DImode);
operands[4] = operand_subword (operands[1], 0, 0, DImode);
***************
*** 4308,4319 ****
(define_insn "*add<mode>3_alc_cc"
[(set (reg CC_REGNUM)
(compare
! (plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0")
! (match_operand:GPR 2 "general_operand" "d,m"))
! (match_operand:GPR 3 "s390_alc_comparison" ""))
(const_int 0)))
(set (match_operand:GPR 0 "register_operand" "=d,d")
! (plus:GPR (plus:GPR (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_CPU_ZARCH"
"@
alc<g>r\t%0,%2
--- 4310,4321 ----
(define_insn "*add<mode>3_alc_cc"
[(set (reg CC_REGNUM)
(compare
! (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "")
! (match_operand:GPR 1 "nonimmediate_operand" "%0,0"))
! (match_operand:GPR 2 "general_operand" "d,m"))
(const_int 0)))
(set (match_operand:GPR 0 "register_operand" "=d,d")
! (plus:GPR (plus:GPR (match_dup 3) (match_dup 1)) (match_dup 2)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_CPU_ZARCH"
"@
alc<g>r\t%0,%2
***************
*** 4323,4331 ****
; alcr, alc, alcgr, alcg
(define_insn "*add<mode>3_alc"
[(set (match_operand:GPR 0 "register_operand" "=d,d")
! (plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0")
! (match_operand:GPR 2 "general_operand" "d,m"))
! (match_operand:GPR 3 "s390_alc_comparison" "")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_CPU_ZARCH"
"@
--- 4325,4333 ----
; alcr, alc, alcgr, alcg
(define_insn "*add<mode>3_alc"
[(set (match_operand:GPR 0 "register_operand" "=d,d")
! (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "")
! (match_operand:GPR 1 "nonimmediate_operand" "%0,0"))
! (match_operand:GPR 2 "general_operand" "d,m")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_CPU_ZARCH"
"@
***************
*** 4386,4393 ****
"&& reload_completed"
[(set (match_dup 0) (const_int 0))
(parallel
! [(set (match_dup 0) (plus:GPR (plus:GPR (match_dup 0) (match_dup 0))
! (match_dup 1)))
(clobber (reg:CC CC_REGNUM))])]
"")
--- 4388,4395 ----
"&& reload_completed"
[(set (match_dup 0) (const_int 0))
(parallel
! [(set (match_dup 0) (plus:GPR (plus:GPR (match_dup 1) (match_dup 0))
! (match_dup 0)))
(clobber (reg:CC CC_REGNUM))])]
"")