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[PATCH] Try to preserve base/index regclass of indexed ld/st operands


The following patch tries to maintain the original base/index regclass of
the operands of an indexed load/store.  We were seeing occurrences on
PowerPC where the regclasses would get swapped, which then allowed r0 to be
chosen for the base reg operand.  Since r0 is not a valid operand for the
base reg postion we would later swap the operand order which led to
performance regressions on Power6(see
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=28690 for background).  I have
run SPEC CPU2000 on both PowerPC and x86_64.  On PowerPC, galgel showed a
15% improvement and the remainder were pretty much neutral.  On x86_64, all
but twolf were neutral.  Twolf showed a 4% degradation, but repeated runs
of the executable outside of the spec testing harness gave inconsistent
results.  The base execution times ranged from 206-224 seconds, while the
version built with my patch ranged from 211-224 seconds.

Bootstrapped and regtested on powerpc64-linux with no new errors.  OK for
mainline?

-Pat


2007-08-22  Pat Haugen  <pthaugen@us.ibm.com>

      * reload.c (find_reloads_address_1): Try to preserve original
base/index
      regclass of operands.
      * regrename.c (scan_rtx_address): Likewise.
      (replace_oldest_value_addr): Likewise.

(See attached file: base_index.diff)

Attachment: base_index.diff
Description: Binary data


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