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Hi. This patch changes zero_extendXXXX2 instructions pattern from 'define_insn' to 'define_insn_and_split' and add zero_extendXXXX2 insn for DI mode. This changes allows optimize 'CLR reg' instruction if the compiler knows that the register already contains 0. Code size reduction, in real word applications, approximately 1 instruction for 2000. No new regressions with this patch. Committed. 2007-07-05 Anatoly Sokolov <aesok@post.ru> * config/avr/avr.md (zero_extendqihi2, zero_extendqisi2, zero_extendhisi2): Change to define_insn_and_split. (zero_extendqidi2, zero_extendhidi2, zero_extendsidi2): New. Anatoly.
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zero_extend.txt
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