This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

make -march override compiler defaults on x86


I think that -march=i386, with no other -m options, should produce
code that actually works on an i386, and the testsuite does too.

Bootstrapped (without java) on i386-darwin9, will commit when
testsuite finishes.

-- 
- Geoffrey Keating <geoffk@apple.com>

===File ~/patches/gcc-i386-marchoverridesdefault.patch======
2007-06-13  Geoff Keating  <geoffk@apple.com>

	* config/i386/i386.c (override_options): Make -march=i386 override
	a target's default settings.

Index: gcc/config/i386/i386.c
===================================================================
--- gcc/config/i386/i386.c	(revision 125627)
+++ gcc/config/i386/i386.c	(working copy)
@@ -2005,9 +2005,56 @@
     sorry ("%i-bit mode not compiled in",
 	   (ix86_isa_flags & OPTION_MASK_ISA_64BIT) ? 64 : 32);
 
+  if (TARGET_64BIT)
+    {
+      target_flags |= TARGET_SUBTARGET64_DEFAULT & ~target_flags_explicit;
+
+      /* Enable by default the SSE and MMX builtins.  Do allow the user to
+	 explicitly disable any of these.  In particular, disabling SSE and
+	 MMX for kernel code is extremely useful.  */
+      ix86_isa_flags
+	|= ((OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_MMX
+	     | TARGET_SUBTARGET64_ISA_DEFAULT) & ~ix86_isa_flags_explicit);
+
+      if (TARGET_RTD)
+	warning (0, "-mrtd is ignored in 64bit mode");
+    }
+  else
+    {
+      target_flags |= TARGET_SUBTARGET32_DEFAULT & ~target_flags_explicit;
+
+      ix86_isa_flags
+	|= TARGET_SUBTARGET32_ISA_DEFAULT & ~ix86_isa_flags_explicit;
+
+      /* i386 ABI does not specify red zone.  It still makes sense to use it
+         when programmer takes care to stack from being destroyed.  */
+      if (!(target_flags_explicit & MASK_NO_RED_ZONE))
+        target_flags |= MASK_NO_RED_ZONE;
+    }
+
   for (i = 0; i < pta_size; i++)
     if (! strcmp (ix86_arch_string, processor_alias_table[i].name))
       {
+	static const struct 
+	{
+	  int pta;
+	  int isa;
+	} proc_flags[] = 
+	    {
+	      { PTA_MMX, OPTION_MASK_ISA_MMX },
+	      { PTA_3DNOW, OPTION_MASK_ISA_3DNOW },
+	      { PTA_3DNOW_A, OPTION_MASK_ISA_3DNOW_A },
+	      { PTA_SSE, OPTION_MASK_ISA_SSE },
+	      { PTA_SSE2, OPTION_MASK_ISA_SSE2 },
+	      { PTA_SSE3, OPTION_MASK_ISA_SSE3 },
+	      { PTA_SSSE3, OPTION_MASK_ISA_SSSE3 },
+	      { PTA_SSE4_1, OPTION_MASK_ISA_SSE4_1 },
+	      { PTA_SSE4_2, OPTION_MASK_ISA_SSE4_2 },
+	      { PTA_SSE4A, OPTION_MASK_ISA_SSE4A },
+	      { PTA_MMX, OPTION_MASK_ISA_MMX }
+	    };
+	size_t pfi;
+		
 	ix86_arch = processor_alias_table[i].processor;
 	/* Default cpu tuning to the architecture.  */
 	ix86_tune = ix86_arch;
@@ -2016,36 +2063,13 @@
 	  error ("CPU you selected does not support x86-64 "
 		 "instruction set");
 
-	if (processor_alias_table[i].flags & PTA_MMX
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_MMX))
-	  ix86_isa_flags |= OPTION_MASK_ISA_MMX;
-	if (processor_alias_table[i].flags & PTA_3DNOW
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW))
-	  ix86_isa_flags |= OPTION_MASK_ISA_3DNOW;
-	if (processor_alias_table[i].flags & PTA_3DNOW_A
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_3DNOW_A))
-	  ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_A;
-	if (processor_alias_table[i].flags & PTA_SSE
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE))
-	  ix86_isa_flags |= OPTION_MASK_ISA_SSE;
-	if (processor_alias_table[i].flags & PTA_SSE2
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE2))
-	  ix86_isa_flags |= OPTION_MASK_ISA_SSE2;
-	if (processor_alias_table[i].flags & PTA_SSE3
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE3))
-	  ix86_isa_flags |= OPTION_MASK_ISA_SSE3;
-	if (processor_alias_table[i].flags & PTA_SSSE3
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SSSE3))
-	  ix86_isa_flags |= OPTION_MASK_ISA_SSSE3;
-	if (processor_alias_table[i].flags & PTA_SSE4_1
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_1))
-	  ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1;
-	if (processor_alias_table[i].flags & PTA_SSE4_2
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4_2))
-	  ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2;
-	if (processor_alias_table[i].flags & PTA_SSE4A
-	    && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SSE4A))
-	  ix86_isa_flags |= OPTION_MASK_ISA_SSE4A;
+	for (pfi = 0; pfi < ARRAY_SIZE (proc_flags); pfi++)
+	  if (!(ix86_isa_flags_explicit & proc_flags[pfi].isa))
+	    {
+	      ix86_isa_flags &= ~proc_flags[pfi].isa;
+	      if (processor_alias_table[i].flags & proc_flags[pfi].pta)
+		ix86_isa_flags |= proc_flags[pfi].isa;
+	    }
 
 	if (processor_alias_table[i].flags & PTA_ABM)
 	  x86_abm = true;
@@ -2223,33 +2247,6 @@
 	error ("pc%d is not valid precision setting (32, 64 or 80)", i);
     }
 
-  if (TARGET_64BIT)
-    {
-      target_flags |= TARGET_SUBTARGET64_DEFAULT & ~target_flags_explicit;
-
-      /* Enable by default the SSE and MMX builtins.  Do allow the user to
-	 explicitly disable any of these.  In particular, disabling SSE and
-	 MMX for kernel code is extremely useful.  */
-      ix86_isa_flags
-	|= ((OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_MMX
-	     | TARGET_SUBTARGET64_ISA_DEFAULT) & ~ix86_isa_flags_explicit);
-
-      if (TARGET_RTD)
-	warning (0, "-mrtd is ignored in 64bit mode");
-    }
-  else
-    {
-      target_flags |= TARGET_SUBTARGET32_DEFAULT & ~target_flags_explicit;
-
-      ix86_isa_flags
-	|= TARGET_SUBTARGET32_ISA_DEFAULT & ~ix86_isa_flags_explicit;
-
-      /* i386 ABI does not specify red zone.  It still makes sense to use it
-         when programmer takes care to stack from being destroyed.  */
-      if (!(target_flags_explicit & MASK_NO_RED_ZONE))
-        target_flags |= MASK_NO_RED_ZONE;
-    }
-
   /* Keep nonleaf frame pointers.  */
   if (flag_omit_frame_pointer)
     target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER;
============================================================


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]