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Re: [PATCH] Fix PR middle-end/28690, indexed load/store performance + reload bug
Ok, now that we have the latent reload bug fixed, I'm looking at the
three users of commutative_operand_precedence(). They are:
Looking at them, it seems like we _might_ be able to just marge all
of them into one routine. However, I have a question regarding your
change to simplify_plus_minus_op_data_cmp() on 2006-09-05. Specifically
the change that breaks ties for REGs by comparing their regnos. Do you
remember why you made that change (checked in as part of PR26847)?
It was needed so that simplify_plus_minus_op_data_cmp (which is used as
part of sorting) keeps registers with the same regno together. This
way, if it finds something like (r1 + r2 - r1) it will be rewritten as
(r1 - r1 + r2) and find something to simplify.
In other words, since we go through the simplification loop if swaps
happen during the sort, we want more swaps to happen to mark that
canonicalization can happen.
If you can change s_p_m_o_d_c and still have no problems with PR26847,
(BTW, remember I can help with x86 SPEC testing if you need it).