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Re: [PATCH] Fix PR middle-end/28690, indexed load/store performance + reload bug

On Tue, 2006-12-05 at 14:26 +0100, Paolo Bonzini wrote:
> > -	*addr = gen_rtx_PLUS (Pmode, *addr, base);
> > +	{
> > +	  /* For performance reasons on some processors, prefer
> > +	     the pointer being the first operand of the PLUS.  */
> > +	  if (REG_P (*addr) && !REG_POINTER (*addr)
> > +	      && REG_P (base) && REG_POINTER (base))
> > +	    *addr = gen_rtx_PLUS (Pmode, base, *addr);
> > +	  else
> > +	    *addr = gen_rtx_PLUS (Pmode, *addr, base);
> In theory, given the change you made to rtlanal.c, this should be done with
>    *addr = simplify_gen_binary (PLUS, Pmode, base, *addr);
> If this does not work, it is probably because the
> swap_commutative_operands_p change does not affect other users of
> commutative_operand_precedence.

How about if we back out the change to swap_commutative_operands_p
and instead modify commutative_operand_precedence to return slightly
different values for REGs versus REGs with REG_POINTER set?
We'd still keep the relative ordering for all REGs versus all the
other types, but for REG versus REG+REG_POINTER, we'd say swap them
to get the REG+REG_POINTER first.  This would entail modifying the
precedence of some of the types to make room for the REG+REG_POINTER.
Making this change, we should be able to catch all the users of
commutative_operand_precedence without actually having to modify
them.  I'll give it a spin with that change and backing out the
tree-ssa-address.c change and modifying the reload1.c change per
my other reply.


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