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Re: [PATCH] Fix PR middle-end/28690, indexed load/store performance + reload bug


Peter Bergner wrote:

> Index: reload1.c
> ===================================================================
> --- reload1.c	(revision 119497)
> +++ reload1.c	(working copy)
> @@ -2930,7 +2930,7 @@ eliminate_regs_in_insn (rtx insn, int re
>    int icode = recog_memoized (insn);
>    rtx old_body = PATTERN (insn);
>    int insn_is_asm = asm_noperands (old_body) >= 0;
> -  rtx old_set = single_set (insn);
> +  rtx old_set;
>    rtx new_body;
>    int val = 0;
>    int i;
> @@ -2949,6 +2949,12 @@ eliminate_regs_in_insn (rtx insn, int re
>        return 0;
>      }
>  
> +  /* Guard against a PARALLEL with a REG_UNUSED note.  */
> +  if (GET_CODE (PATTERN (insn)) != PARALLEL)
> +    old_set = single_set (insn);
> +  else
> +    old_set = 0;
> +
>    if (old_set != 0 && REG_P (SET_DEST (old_set))
>        && REGNO (SET_DEST (old_set)) < FIRST_PSEUDO_REGISTER)
>      {

I'm not sure about this change.  I'm afraid on platforms where
add instructions are usually a PARALLEL (with a clobber of the
condition code register), the change may cause eliminate_regs_in_insn
to miss instructions that *set* an eliminable register (what the
loop immediately following the above lines tries to find).
I'd expect this to cause problems e.g. on s390 ..

Bye,
Ulrich

-- 
  Dr. Ulrich Weigand
  GNU Toolchain for Linux on System z and Cell BE
  Ulrich.Weigand@de.ibm.com


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