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Re: [PATCH, i386]: Insert "cld" via optimize mode switching
- From: "Richard Guenther" <richard dot guenther at gmail dot com>
- To: "Uros Bizjak" <ubizjak at gmail dot com>
- Cc: "GCC Patches" <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 1 Dec 2006 22:43:43 +0100
- Subject: Re: [PATCH, i386]: Insert "cld" via optimize mode switching
- References: <firstname.lastname@example.org>
On 12/1/06, Uros Bizjak <email@example.com> wrote:
Attached patch optimizes insertion of "cld" instruction via optimize
mode switching pass.
"Original" insn pattern, as emitted by expanders, is splitted just
before mode switching pass into "fake" cld insn pattern "(use (reg:SI
DIRFLAG_REG))", which has the sole purpose of showing its "cld" type
attribute during o_m_s pass. The "real" instruction is generated as
"cld_1" insn pattern during optimize_mode_switching pass at its optimal
position. Although fake cld instructions remain present in insn flow,
they don't emit anything into *.s files. Mode is reset to UNINTIALIZED
after every call and asm insn pattern.
This optimization optimizes (among others) following testcase:
Hmm, do we or the ABI guarantee to save/restore the necessary state
on entry/exit of signal handlers? So, is this optimization safe for
synchronous signals and/or exceptions?