This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH, i386]: Insert "cld" via optimize mode switching


On 12/1/06, Uros Bizjak <ubizjak@gmail.com> wrote:
Hello!

Attached patch optimizes insertion of "cld" instruction via optimize
mode switching pass.

"Original" insn pattern, as emitted by expanders, is splitted just
before mode switching pass into "fake" cld insn pattern "(use (reg:SI
DIRFLAG_REG))", which has the sole purpose of showing its "cld" type
attribute during o_m_s pass. The "real" instruction is generated as
"cld_1" insn pattern during optimize_mode_switching pass at its optimal
position. Although fake cld instructions remain present in insn flow,
they don't emit anything into *.s files. Mode is reset to UNINTIALIZED
after every call and asm insn pattern.

This optimization optimizes (among others) following testcase:

Hmm, do we or the ABI guarantee to save/restore the necessary state on entry/exit of signal handlers? So, is this optimization safe for synchronous signals and/or exceptions?

Richard.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]