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Re: [PATCH][PING] Expand lrint inline for x86_64/i?86 SSE math
- From: Roger Sayle <roger at eyesopen dot com>
- To: Richard Guenther <rguenther at suse dot de>
- Cc: geoffk at geoffk dot org, <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 24 Oct 2006 21:07:40 -0600 (MDT)
- Subject: Re: [PATCH][PING] Expand lrint inline for x86_64/i?86 SSE math
On Tue, 24 Oct 2006, Richard Guenther wrote:
> 2006-08-23 Richard Guenther <email@example.com>
> * optabs.h (enum optab_index): Remove OTI_lrint.
> (enum convert_optab_index): Add COI_lrint.
> (lrint_optab): Adjust.
> (expand_sfix_optab): Declare.
> * optabs.c (expand_sfix_optab): New function.
> (init_optabs): Init lrint_optab as conversion optab.
> * genopinit.c (lrint_optab): Change to a conversion optab.
> * builtins.c (expand_builtin_int_roundingfn_2): Adjust to
> expansion via conversion optab.
> * config/i386/i386.md (*fistdi2_1): Remove
> flag_unsafe_math_optimizations guard.
> (fistdi2, fistdi2_with_temp, *fist<mode>2_1, fist<mode>2,
> fist<mode>2_with_temp): Likewise.
> (lrint<mode>2): Split into...
> (lrintxf<mode>2): ... x87 part
> (lrint<mode>di2, lrint<mode>si2): ... and SSE parts.
> * config/i386/sse.md (sse_cvtss2si_2, sse_cvtss2_siq_2,
> sse2_cvtsd2si_2, sse2_cvtsd2siq_2): New insns for
> UNSPEC_FIX_NOTRUNC matching non-vector float modes.
> * doc/md.texi (lrintMN2): Document.
> * gcc.target/i386/math-torture/math-torture.exp: Torture
> for interesting ia32 math options.
> * gcc.target.i386/math-torture/lrint.c: New testcase.
Many thanks for taking the time to refresh and repost this patch
series, now that we're back in stage1. This one is OK for mainline.
The new math-torture.exp looks reasonable, but not I'm not a
testsuite expert, so I'll provisionally approve the new directory
but be prepared to make any changes/improvements requested by
Janis. If you're not confident with the new .exp file, feel
free to hold off commiting the new tests until you get a more
Sorry for the delay in commenting on this set of patches. When
I looked over the original postings, everything looked good and
I agree with the design philsophy, so provided mainline remains
stable during stage 1, I'd hope to approve the rest of the series
fairly quickly. I'd only ask that you retest each submission
independently before posting. Given the "air traffic control"
of stage1, with x86 builtins changes from you, Uros and Honza
all going into mainline concurrently, it's common sense to double
check there are no bad interactions lest we break bootstrap and
annoy the community.
I'm looking forward to benchmarking the SSE performance benefits.
Many thanks again for implementing this functionality.