Re: Assembler Error: orerand out of rage (145 not between -128 and 127) for m32r target

[Kazuhiro Inaoka <inaoka dot kazuhiro at renesas dot com>]

Ni Nick,

I reported it.
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=28508

Regards,
Kazuhiro Inaoka

Nick Clifton wrote:

> Hi Kazuhiro,
>
> > > >    [(set_attr "type" "branch")
> > > > -   ; We use 400/800 instead of 512,1024 to account for inaccurate  
> > > > insn
> > > > +   ; We use 300/600 instead of 512,1024 to account for inaccurate  
> > > > insn
> > > >     ; lengths and insn alignments that are complex to track.
> > >
> > >
> > >
> > > Gross.  :-)  I'd have a preference for finding the most inaccurate  
> > > part of the estimate and then improving just that one spot.
> > bc.s and bnc.s have the range (form -512 to 508) of PC-relative.
> >
> > If all 2byte instruction have alignment code (pnop)of debug information,
> > we must use 254/508.
> > But it's rare case.
>
>
> Would you mind creating an official bug report for this problem, and 
> including your patch and the test case.  I think that we need to keep 
> track of this problem.
>
> Ideally of course we should be able to precisely calculate the real 
> offset between the branch and its destination, but for now, your patch 
> is an acceptable workaround.
>
> Cheers
>   Nick