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Re: [patch RFA] SH: Fix PR target/28232
- From: Kaz Kojima <kkojima at rr dot iij4u dot or dot jp>
- To: richard at codesourcery dot com
- Cc: gcc-patches at gcc dot gnu dot org, joern dot rennecke at st dot com, aoliva at redhat dot com
- Date: Sat, 08 Jul 2006 07:31:16 +0900 (JST)
- Subject: Re: [patch RFA] SH: Fix PR target/28232
- References: <20060707.073313.26962558.kkojima@rr.iij4u.or.jp> <874pxt1n9o.fsf@talisman.home>
Richard Sandiford <richard@codesourcery.com> wrote:
> My solution was similar, but went a step further. I think the problem
> here is not the sign-extract itself (although it is a silly and very
> fragile hack, and I agree it shouldn't be there). I think the real
> problem is that SImode accesses simply shouldn't be unaligned on a
> strict-alignment target. We should represent the source as a 4-byte
> BLKmode reference instead.
>
> FWIW, here's the patch I used in the 3.4 backport. I haven't tested it to
> see whether it still applies or works. (In fact, I no longer have access
> to sh4a hardware, which one of the reasons why I didn't submit before.)
Thanks! I've updated it so as to match with the current mainline
and attached it here. Joern, could you approve Richard's patch
for the next stage1, if it's regtested on sh-sim?
Regards,
kaz
--
diff -uprN ORIG/trunk/gcc/config/sh/sh.c LOCAL/trunk/gcc/config/sh/sh.c
--- ORIG/trunk/gcc/config/sh/sh.c 2006-06-14 06:15:09.000000000 +0900
+++ LOCAL/trunk/gcc/config/sh/sh.c 2006-07-08 06:51:39.000000000 +0900
@@ -1074,8 +1074,10 @@ expand_block_move (rtx *operands)
while (copied + 4 <= bytes)
{
rtx to = adjust_address (dest, SImode, copied);
- rtx from = adjust_automodify_address (src, SImode, src_addr, copied);
+ rtx from = adjust_automodify_address (src, BLKmode,
+ src_addr, copied);
+ set_mem_size (from, GEN_INT (4));
emit_insn (gen_movua (temp, from));
emit_move_insn (src_addr, plus_constant (src_addr, 4));
emit_move_insn (to, temp);
diff -uprN ORIG/trunk/gcc/config/sh/sh.md LOCAL/trunk/gcc/config/sh/sh.md
--- ORIG/trunk/gcc/config/sh/sh.md 2006-06-14 06:15:09.000000000 +0900
+++ LOCAL/trunk/gcc/config/sh/sh.md 2006-07-08 06:49:14.000000000 +0900
@@ -152,6 +152,7 @@
(UNSPEC_THUNK 36)
(UNSPEC_SP_SET 40)
(UNSPEC_SP_TEST 41)
+ (UNSPEC_MOVUA 42)
;; These are used with unspec_volatile.
(UNSPECV_BLOCKAGE 0)
@@ -11121,8 +11122,8 @@ mov.l\\t1f,r0\\n\\
(define_insn "movua"
[(set (match_operand:SI 0 "register_operand" "=z")
- (sign_extract:SI (match_operand:SI 1 "unaligned_load_operand" "Sua>")
- (const_int 32) (const_int 0)))]
+ (unspec:SI [(match_operand:BLK 1 "unaligned_load_operand" "Sua>")]
+ UNSPEC_MOVUA))]
"TARGET_SH4A_ARCH"
"movua.l %1,%0"
[(set_attr "type" "movua")])
@@ -11155,8 +11156,9 @@ mov.l\\t1f,r0\\n\\
&& INTVAL (operands[3]) == -24 * (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
&& GET_CODE (operands[1]) == MEM && MEM_ALIGN (operands[1]) < 32)
{
- emit_insn (gen_movua (operands[0],
- adjust_address (operands[1], SImode, 0)));
+ rtx src = adjust_address (operands[1], BLKmode, 0);
+ set_mem_size (src, GEN_INT (4));
+ emit_insn (gen_movua (operands[0], src));
DONE;
}
@@ -11175,8 +11177,9 @@ mov.l\\t1f,r0\\n\\
&& INTVAL (operands[3]) == -24 * (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
&& GET_CODE (operands[1]) == MEM && MEM_ALIGN (operands[1]) < 32)
{
- emit_insn (gen_movua (operands[0],
- adjust_address (operands[1], SImode, 0)));
+ rtx src = adjust_address (operands[1], BLKmode, 0);
+ set_mem_size (src, GEN_INT (4));
+ emit_insn (gen_movua (operands[0], src));
DONE;
}