diff -Nau orig/gcc/config/mips/mips.opt ip28/gcc/config/mips/mips.opt
--- orig/gcc/config/mips/mips.opt Sat Jul 23 10:36:54 2005
+++ ip28/gcc/config/mips/mips.opt Mon Feb 27 00:47:22 2006
@@ -216,3 +216,7 @@
mxgot
Target Report Var(TARGET_XGOT)
Lift restrictions on GOT size
+
+mip28-cache-barrier
+Target Report RejectNegative Var(mips_ip28_cache_barrier)
+Generate special cache barriers for SGI Indigo2 R10k
diff -Nau orig/gcc/config/mips/mips.h ip28/gcc/config/mips/mips.h
--- orig/gcc/config/mips/mips.h Wed Feb 8 19:31:36 2006
+++ ip28/gcc/config/mips/mips.h Mon Feb 27 00:09:36 2006
@@ -194,6 +194,7 @@
#define TARGET_MIPS9000 (mips_arch == PROCESSOR_R9000)
#define TARGET_SB1 (mips_arch == PROCESSOR_SB1)
#define TARGET_SR71K (mips_arch == PROCESSOR_SR71000)
+#define TARGET_IP28 (mips_ip28_cache_barrier != 0)
/* Scheduling target defines. */
#define TUNE_MIPS3000 (mips_tune == PROCESSOR_R3000)
diff -Nau orig/gcc/config/mips/mips.c ip28/gcc/config/mips/mips.c
--- orig/gcc/config/mips/mips.c Mon Feb 6 19:20:47 2006
+++ ip28/gcc/config/mips/mips.c Mon Feb 27 00:43:09 2006
@@ -8927,6 +8927,13 @@
if (TUNE_MIPS4130 && TARGET_VR4130_ALIGN)
vr4130_align_insns ();
}
+#ifdef TARGET_IP28
+ if (TARGET_IP28)
+ {
+ static int ip28_for_each_bb (void);
+ ip28_for_each_bb ();
+ }
+#endif
}
/* This function does three things:
@@ -10783,5 +10790,9 @@
bitmap_set_bit (regs, PIC_FUNCTION_ADDR_REGNUM);
}
+
+#ifdef TARGET_IP28
+#include "ip28.c"
+#endif