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Re: [PATCH] bit-field merging improvements to combine.c
- From: Andrew Pinski <pinskia at physics dot uc dot edu>
- To: Roger Sayle <roger at eyesopen dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Thu, 29 Dec 2005 00:02:17 -0500
- Subject: Re: [PATCH] bit-field merging improvements to combine.c
- References: <Pine.LNX.4.44.0512282045580.10324-100000@www.eyesopen.com>
On Dec 28, 2005, at 11:13 PM, Roger Sayle wrote:
and the second successful merge combination further combines:
(insn 12 11 14 2 (set (reg:SI 58)
(const_int 1 [0x1])) 40 {*movsi_1} ...)
with
(insn 14 12 16 2 (set (zero_extract:DI (subreg:DI (reg:SI 58) 0)
(const_int 8 [0x8])
(const_int 8 [0x8]))
(const_int 2 [0x2])) 71 {movdi_insv_1_rex64} ...)
I wonder if this also improves the code generated for PR 17959.
Though it sounds from the changelog it does not.
The RTL we have in combine is:
(insn 10 7 11 2 (set (reg:DI 126)
(const_int 0 [0x0])) 347 {*movdi_internal64} (nil)
(nil))
(insn 11 10 12 2 (set (zero_extract:DI (reg:DI 126)
(const_int 32 [0x20])
(const_int 0 [0x0]))
(reg:DI 3 r3 [ n ])) 167 {insvdi} (insn_list:REG_DEP_TRUE 10
(nil))
(expr_list:REG_DEAD (reg:SI 3 r3 [ n ])
(nil)))
(insn 12 11 14 2 (set (zero_extract:DI (reg:DI 126)
(const_int 32 [0x20])
(const_int 32 [0x20]))
(reg:DI 4 r4 [ n+4 ])) 167 {insvdi} (insn_list:REG_DEP_TRUE 11
(nil))
(expr_list:REG_DEAD (reg:SI 4 r4 [ n+4 ])
(nil)))
Thanks,
Andrew Pinski