[PATCH] Fix movqi_1 (PR target/25199)

[Jakub Jelinek <jakub at redhat dot com>]

Hi!

PR target/25199 is about movqi_1 insn using movl into a non-q class
register even when it doesn't know it is at least 32-bit aligned.
I have fixed it on gcc-4_0-branch (see attached gcc4-pr25199.patch),
then later on when trying to forward port it to trunk/4.1
I noticed Dale fixed the same problem already half a year ago
on the trunk.  But comparing the two changes I think the one that
went onto mainline was unnecessarily big hammer, movl is 1 byte
shorter than movzbl, so for -Os it is preferrable to use movl
over movzbl if we know it is aligned.  So, I'm also attaching
a patch for trunk/4.1.  Additionally, I was really surprised
aligned_operand doesn't use MEM_ALIGN (I know it predates
MEM_ALIGN by ~ 1 year), so this patch makes use of it too
and only falls back to the current logic if MEM_ALIGN ()
doesn't prove sufficient alignment.

Ok for trunk/4.1/4.0?

	Jakub

Attachment: gcc41-pr25199.patch
Description: Text document

Attachment: gcc4-pr25199.patch
Description: Text document