Re: [patch] m68k/*.md: Fix PR target/24949.

[Kazu Hirata <kazu at codesourcery dot com>]

Hi Andreas,

> > This is because expander "ashrdi3" accepts shift count of 32, but the
> > corresponding define_insn pattern does not accept the shift count.
>
>
> Wouldn't ashldi3 have the same problem?

Yes.  Actually, I just noticed that ashrdi3 has one expander and three helper 
insns.  Quite messy. :-(

(define_insn "ashrdi_const32"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (ashiftrt:DI (match_operand:DI 1 "general_operand" "ro")
                     (const_int 32)))]
  ""

(define_insn "ashrdi_const32_mem"
  [(set (match_operand:DI 0 "nonimmediate_operand" "=o,<")
        (ashiftrt:DI (match_operand:DI 1 "general_operand" "ro,ro")
                     (const_int 32)))
   (clobber (match_scratch:SI 2 "=d,d"))]
  ""

(define_insn "ashrdi_const"
  [(set (match_operand:DI 0 "nonimmediate_operand" "=d")
        (ashiftrt:DI (match_operand:DI 1 "general_operand" "0")
                     (match_operand 2 "const_int_operand" "n")))]
  "(!TARGET_COLDFIRE
    && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
        || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
        || INTVAL (operands[2]) == 31
        || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63)))"

So we can let ashrdi3 accept shift count of 32, but we either have to add a 
scrach register or force the operand to a register.  I think it's best to merge 
these patterns.  I'll work on this.

> > 	* config/m68k/m68k.md (ashrdi_const32_mem, ashrdi3): Use
>
>
> You are actually changing ashrdi_const, not ashrdi_const32_mem.

Oops.  Thanks.

Kazu Hirata