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4.0 fix for PR24950, ICE in operand_subword_force
- From: Alan Modra <amodra at bigpond dot net dot au>
- To: Mark Mitchell <mark at codesourcery dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Wed, 23 Nov 2005 00:06:14 +1030
- Subject: 4.0 fix for PR24950, ICE in operand_subword_force
Hi Mark,
To fix this PR on the 4.0 branch, I need to backport
http://gcc.gnu.org/ml/gcc-patches/2005-11/msg00923.html as well as apply
my tweak. Bootstrapped and regression tested powerpc64-linux. OK to
apply?
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 107345)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,15 @@
+2005-11-22 Alan Modra <amodra@bigpond.net.au>
+
+ PR middle-end/24950
+ * expmed.c (store_bit_field): Don't attempt to insv a field
+ larger than the reg.
+
+ Merge from trunk 2005-11-14 Dale Johannesen <dalej@apple.com>
+ * expmed.c (store_bit_field): Add offset unconditionally for
+ memory targets.
+ (extract_bit_field): Don't force extzv or extv operand into
+ a register if field is too big.
+
2005-11-19 Richard Henderson <rth@redhat.com>
PR tree-opt/24665
Index: gcc/expmed.c
===================================================================
--- gcc/expmed.c (revision 107345)
+++ gcc/expmed.c (working copy)
@@ -438,14 +438,11 @@ store_bit_field (rtx str_rtx, unsigned H
|| (offset * BITS_PER_UNIT % bitsize == 0
&& MEM_ALIGN (op0) % GET_MODE_BITSIZE (fieldmode) == 0))))
{
- if (GET_MODE (op0) != fieldmode)
- {
- if (MEM_P (op0))
- op0 = adjust_address (op0, fieldmode, offset);
- else
- op0 = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0),
- byte_offset);
- }
+ if (MEM_P (op0))
+ op0 = adjust_address (op0, fieldmode, offset);
+ else if (GET_MODE (op0) != fieldmode)
+ op0 = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0),
+ byte_offset);
emit_move_insn (op0, value);
return value;
}
@@ -656,6 +653,7 @@ store_bit_field (rtx str_rtx, unsigned H
bestmode = GET_MODE (op0);
if (bestmode == VOIDmode
+ || GET_MODE_SIZE (bestmode) < GET_MODE_SIZE (fieldmode)
|| (SLOW_UNALIGNED_ACCESS (bestmode, MEM_ALIGN (op0))
&& GET_MODE_BITSIZE (bestmode) > MEM_ALIGN (op0)))
goto insv_loses;
@@ -1419,6 +1417,11 @@ extract_bit_field (rtx str_rtx, unsigned
xbitpos = bitnum % unit;
xop0 = adjust_address (xop0, bestmode, xoffset);
+ /* Make sure register is big enough for the whole field. */
+ if (xoffset * BITS_PER_UNIT + unit
+ < offset * BITS_PER_UNIT + bitsize)
+ goto extzv_loses;
+
/* Fetch it to a register in that size. */
xop0 = force_reg (bestmode, xop0);
@@ -1548,6 +1551,11 @@ extract_bit_field (rtx str_rtx, unsigned
xbitpos = bitnum % unit;
xop0 = adjust_address (xop0, bestmode, xoffset);
+ /* Make sure register is big enough for the whole field. */
+ if (xoffset * BITS_PER_UNIT + unit
+ < offset * BITS_PER_UNIT + bitsize)
+ goto extv_loses;
+
/* Fetch it to a register in that size. */
xop0 = force_reg (bestmode, xop0);
Index: gcc/testsuite/ChangeLog
===================================================================
--- gcc/testsuite/ChangeLog (revision 107345)
+++ gcc/testsuite/ChangeLog (working copy)
@@ -1,3 +1,9 @@
+2005-11-22 Alan Modra <amodra@bigpond.net.au>
+
+ PR middle-end/24950
+ Copy from trunk 2005-11-14 Dale Johannesen <dalej@apple.com>
+ * gcc.c-torture/execute/20051113-1.c: New.
+
2005-11-21 Paul Thomas <pault@gcc.gnu.org
PR fortran/24223
--
Alan Modra
IBM OzLabs - Linux Technology Centre