This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: TLS support for ARM


On Tue, 2005-10-11 at 15:31, Daniel Jacobowitz wrote:

> I've done this in the attached patch.  I'm very leery of it, though. 
> In particular, from arch/arm/mm/Kconfig in the current Linux kernel:
> 
> config HAS_TLS_REG
>         bool
>         depends on !TLS_REG_EMUL
>         default y if SMP || CPU_32v7
>         help
>           This selects support for the CP15 thread register.
>           It is defined to be available on some ARMv6 processors (including
>           all SMP capable ARMv6's) or later processors.  User space may
>           assume directly accessing that register and always obtain the
>           expected value only on ARMv7 and above.
> 

Which implies that the current linux code doesn't really support the
arm1176jz-s yet.

> The ARM Linux kernel only supports the thread register on SMP v6
> configurations.  If we generate code that uses it, it Won't Work.  So
> if someone goes out of their way to tell GCC which processor they're
> compiling for, they may end up with broken TLS unless they know to use
> -mtp=soft.
> 

I don't really see this as being any different from a user compiling
with -mcpu=arm10 and then expecting code to run on an arm9.

> May as well get it right the first time.  Is the attached patch OK to
> commit, assuming testing goes OK?

Yes, this is fine.  Better wait for Mark's code freeze to be lifted now
though. 

R.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]