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[PATCH, committed] POWER tweak

	The radiation hardened RAD6000 processor is available and in use.
This patch recovers some of the eq:SI optimizaion for POWER.

Bootstrapped on powerpc-ibm-aix5.1.0.0

David


	* config/rs6000/rs6000.md (eqsi_power): New.
	(neg_eq0si): Add TARGET_POWER to final condition.
	(neg_eqsi): Same.

Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.413
diff -c -p -r1.413 rs6000.md
*** rs6000.md	6 Oct 2005 16:39:12 -0000	1.413
--- rs6000.md	7 Oct 2005 14:26:37 -0000
***************
*** 11229,11234 ****
--- 11229,11249 ----
      operands[5] = GEN_INT (exact_log2 (GET_MODE_BITSIZE (<MODE>mode)));
    })
  
+ (define_insn "*eqsi_power"
+   [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r")
+ 	(eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
+ 	       (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I")))
+    (clobber (match_scratch:SI 3 "=r,&r,r,r,r"))]
+   "TARGET_POWER"
+   "@
+    xor %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0
+    {sfi|subfic} %3,%1,0\;{ae|adde} %0,%3,%1
+    {xoril|xori} %0,%1,%b2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0
+    {xoriu|xoris} %0,%1,%u2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0
+    {sfi|subfic} %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0"
+   [(set_attr "type" "three,two,three,three,three")
+    (set_attr "length" "12,8,12,12,12")])
+ 
  ;; We have insns of the form shown by the first define_insn below.  If
  ;; there is something inside the comparison operation, we must split it.
  (define_split
***************
*** 11349,11355 ****
    [(set (match_operand:P 0 "gpc_reg_operand" "=r")
  	(neg:P (eq:P (match_operand:P 1 "gpc_reg_operand" "r")
  		     (const_int 0))))]
!   "optimize_size"
    "{ai|addic} %0,%1,-1\;{sfe|subfe} %0,%0,%0"
    [(set_attr "type" "two")
     (set_attr "length" "8")])
--- 11364,11370 ----
    [(set (match_operand:P 0 "gpc_reg_operand" "=r")
  	(neg:P (eq:P (match_operand:P 1 "gpc_reg_operand" "r")
  		     (const_int 0))))]
!   "optimize_size || TARGET_POWER"
    "{ai|addic} %0,%1,-1\;{sfe|subfe} %0,%0,%0"
    [(set_attr "type" "two")
     (set_attr "length" "8")])
***************
*** 11358,11366 ****
    [(set (match_operand:P 0 "gpc_reg_operand" "=r")
  	(neg:P (eq:P (match_operand:P 1 "gpc_reg_operand" "%r")
  		     (match_operand:P 2 "scc_eq_operand" "<scc_eq_op2>"))))]
!   "optimize_size"
    "#"
!   "optimize_size"
    [(set (match_dup 0) (neg:P (eq:P (match_dup 3) (const_int 0))))]
    {
      if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) != 0)
--- 11373,11381 ----
    [(set (match_operand:P 0 "gpc_reg_operand" "=r")
  	(neg:P (eq:P (match_operand:P 1 "gpc_reg_operand" "%r")
  		     (match_operand:P 2 "scc_eq_operand" "<scc_eq_op2>"))))]
!   "optimize_size || TARGET_POWER"
    "#"
!   "optimize_size || TARGET_POWER"
    [(set (match_dup 0) (neg:P (eq:P (match_dup 3) (const_int 0))))]
    {
      if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) != 0)
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