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[PATCH, committed] PowerPC zero FP constant (PR 23098)


	This patch changes easy_fp_constant so that SFmode FP constant
always is considered "easy".  This delays it from being forced to memory
early, allowing it to be materialized in GPRs when there are no FPR
preferences.  If it's needed in an FPR, reload eventually forces it to
memory anyway.  DFmode FP constants are not similarly changed, because the
late force_const_mem skips compress_float_constant.

	rs6000_legitimize_reload_address() is updated to extend an
existing Darwin method to ABI_V4 to allow elf_low relocation to be
combined with the movsf instruction.

	The patch also includes a few unrelated gen_rtx_MEM cleanups that
I have been testing.

Bootstrapped and regression tested on powerpc-ibm-aix5.2.0.0

David


	PR rtl-optimization/23098
	* config/rs6000/predicates.md (easy_fp_constant): SFmode constant
	0.0f is easy.
	* config/rs6000/rs6000.md (movdf splitter): Use
	const_double_operand predicate for TARGET_POWERPC64.
	* config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Expand
	SYMBOL_REF method to ABI_V4.

	* config/rs6000/altivec.md (build_vector_mask_for_load): Use
	replace_equiv_address.
	* config/rs6000/rs6000.c (rs6000_emit_eh_reg_restore): Mark MEM as
	rs6000_sr_alias_set and MEM_NOTRAP.
	(rs6000_aix_emit_builtin_unwind_init): Use gen_frame_mem().

Index: altivec.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/altivec.md,v
retrieving revision 1.44
diff -c -p -r1.44 altivec.md
*** altivec.md	22 Aug 2005 08:13:08 -0000	1.44
--- altivec.md	11 Sep 2005 23:08:34 -0000
***************
*** 1838,1844 ****
    emit_insn (gen_rtx_SET (VOIDmode, temp, 
  			  gen_rtx_NEG (GET_MODE (addr), addr)));
    emit_insn (gen_altivec_lvsr (operands[0], 
! 			       gen_rtx_MEM (GET_MODE (operands[1]), temp)));
    DONE;
  }")
  
--- 1838,1844 ----
    emit_insn (gen_rtx_SET (VOIDmode, temp, 
  			  gen_rtx_NEG (GET_MODE (addr), addr)));
    emit_insn (gen_altivec_lvsr (operands[0], 
! 			       replace_equiv_address (operands[1], temp)));
    DONE;
  }")
  
Index: predicates.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/predicates.md,v
retrieving revision 1.25
diff -c -p -r1.25 predicates.md
*** predicates.md	1 Sep 2005 02:47:57 -0000	1.25
--- predicates.md	11 Sep 2005 23:08:34 -0000
***************
*** 235,240 ****
--- 235,244 ----
  	      && num_insns_constant_wide ((HOST_WIDE_INT) k[1]) == 1);
  
      case SFmode:
+       /* The constant 0.f is easy.  */
+       if (op == CONST0_RTX (SFmode))
+ 	return 1;
+ 
        /* Force constants to memory before reload to utilize
  	 compress_float_constant.
  	 Avoid this when flag_unsafe_math_optimizations is enabled
Index: rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.866
diff -c -p -r1.866 rs6000.c
*** rs6000.c	6 Sep 2005 02:04:59 -0000	1.866
--- rs6000.c	11 Sep 2005 23:08:35 -0000
*************** rs6000_legitimize_reload_address (rtx x,
*** 3245,3260 ****
        return x;
      }
  
- #if TARGET_MACHO
    if (GET_CODE (x) == SYMBOL_REF
-       && DEFAULT_ABI == ABI_DARWIN
        && !ALTIVEC_VECTOR_MODE (mode)
        && (flag_pic || MACHO_DYNAMIC_NO_PIC_P)
        /* Don't do this for TFmode, since the result isn't offsettable.
  	 The same goes for DImode without 64-bit gprs.  */
        && mode != TFmode
        && (mode != DImode || TARGET_POWERPC64))
      {
        if (flag_pic)
  	{
  	  rtx offset = gen_rtx_CONST (Pmode,
--- 3245,3265 ----
        return x;
      }
  
    if (GET_CODE (x) == SYMBOL_REF
        && !ALTIVEC_VECTOR_MODE (mode)
+ #if TARGET_MACHO
+       && DEFAULT_ABI == ABI_DARWIN
        && (flag_pic || MACHO_DYNAMIC_NO_PIC_P)
+ #else
+       && DEFAULT_ABI == ABI_V4
+       && !flag_pic
+ #endif
        /* Don't do this for TFmode, since the result isn't offsettable.
  	 The same goes for DImode without 64-bit gprs.  */
        && mode != TFmode
        && (mode != DImode || TARGET_POWERPC64))
      {
+ #if TARGET_MACHO
        if (flag_pic)
  	{
  	  rtx offset = gen_rtx_CONST (Pmode,
*************** rs6000_legitimize_reload_address (rtx x,
*** 3265,3270 ****
--- 3270,3276 ----
  		  gen_rtx_HIGH (Pmode, offset)), offset);
  	}
        else
+ #endif
  	x = gen_rtx_LO_SUM (GET_MODE (x),
  	      gen_rtx_HIGH (Pmode, x), x);
  
*************** rs6000_legitimize_reload_address (rtx x,
*** 3274,3280 ****
        *win = 1;
        return x;
      }
- #endif
  
    /* Reload an offset address wrapped by an AND that represents the
       masking of the lower bits.  Strip the outer AND and let reload
--- 3280,3285 ----
*************** rs6000_emit_eh_reg_restore (rtx source, 
*** 13368,13374 ****
  	  || current_function_calls_alloca
  	  || info->total_size > 32767)
  	{
! 	  emit_move_insn (operands[1], gen_rtx_MEM (Pmode, frame_rtx));
  	  frame_rtx = operands[1];
  	}
        else if (info->push_p)
--- 13373,13382 ----
  	  || current_function_calls_alloca
  	  || info->total_size > 32767)
  	{
! 	  tmp = gen_rtx_MEM (Pmode, frame_rtx);
! 	  MEM_NOTRAP_P (tmp) = 1;
! 	  set_mem_alias_set (tmp, rs6000_sr_alias_set);
! 	  emit_move_insn (operands[1], tmp);
  	  frame_rtx = operands[1];
  	}
        else if (info->push_p)
*************** rs6000_emit_eh_reg_restore (rtx source, 
*** 13376,13381 ****
--- 13384,13391 ----
  
        tmp = plus_constant (frame_rtx, info->lr_save_offset + sp_offset);
        tmp = gen_rtx_MEM (Pmode, tmp);
+       MEM_NOTRAP_P (tmp) = 1;
+       set_mem_alias_set (tmp, rs6000_sr_alias_set);
        emit_move_insn (tmp, operands[0]);
      }
    else
*************** rs6000_aix_emit_builtin_unwind_init (voi
*** 13448,13459 ****
    rtx tocompare = gen_reg_rtx (SImode);
    rtx no_toc_save_needed = gen_label_rtx ();
  
!   mem = gen_rtx_MEM (Pmode, hard_frame_pointer_rtx);
    emit_move_insn (stack_top, mem);
  
!   mem = gen_rtx_MEM (Pmode,
! 		     gen_rtx_PLUS (Pmode, stack_top,
! 				   GEN_INT (2 * GET_MODE_SIZE (Pmode))));
    emit_move_insn (opcode_addr, mem);
    emit_move_insn (opcode, gen_rtx_MEM (SImode, opcode_addr));
    emit_move_insn (tocompare, gen_int_mode (TARGET_32BIT ? 0x80410014
--- 13458,13469 ----
    rtx tocompare = gen_reg_rtx (SImode);
    rtx no_toc_save_needed = gen_label_rtx ();
  
!   mem = gen_frame_mem (Pmode, hard_frame_pointer_rtx);
    emit_move_insn (stack_top, mem);
  
!   mem = gen_frame_mem (Pmode,
! 		       gen_rtx_PLUS (Pmode, stack_top,
! 				     GEN_INT (2 * GET_MODE_SIZE (Pmode))));
    emit_move_insn (opcode_addr, mem);
    emit_move_insn (opcode, gen_rtx_MEM (SImode, opcode_addr));
    emit_move_insn (tocompare, gen_int_mode (TARGET_32BIT ? 0x80410014
*************** rs6000_aix_emit_builtin_unwind_init (voi
*** 13463,13471 ****
  			   SImode, NULL_RTX, NULL_RTX,
  			   no_toc_save_needed);
  
!   mem = gen_rtx_MEM (Pmode,
! 		     gen_rtx_PLUS (Pmode, stack_top,
! 				   GEN_INT (5 * GET_MODE_SIZE (Pmode))));
    emit_move_insn (mem, gen_rtx_REG (Pmode, 2));
    emit_label (no_toc_save_needed);
  }
--- 13473,13481 ----
  			   SImode, NULL_RTX, NULL_RTX,
  			   no_toc_save_needed);
  
!   mem = gen_frame_mem (Pmode,
! 		       gen_rtx_PLUS (Pmode, stack_top,
! 				     GEN_INT (5 * GET_MODE_SIZE (Pmode))));
    emit_move_insn (mem, gen_rtx_REG (Pmode, 2));
    emit_label (no_toc_save_needed);
  }
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.406
diff -c -p -r1.406 rs6000.md
*** rs6000.md	1 Sep 2005 02:47:59 -0000	1.406
--- rs6000.md	11 Sep 2005 23:08:35 -0000
***************
*** 7495,7501 ****
  
  (define_split
    [(set (match_operand:DF 0 "gpc_reg_operand" "")
! 	(match_operand:DF 1 "easy_fp_constant" ""))]
    "TARGET_POWERPC64 && reload_completed
     && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)
         || (GET_CODE (operands[0]) == SUBREG
--- 7495,7501 ----
  
  (define_split
    [(set (match_operand:DF 0 "gpc_reg_operand" "")
! 	(match_operand:DF 1 "const_double_operand" ""))]
    "TARGET_POWERPC64 && reload_completed
     && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)
         || (GET_CODE (operands[0]) == SUBREG


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