This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[PATCH] target/PR23747


Hi Nick,

It seems the following problem is cause of regmove optimization
(optimize_reg_copy1():regmove.c).
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=23747

But I have a workaround patch to avoid this problem for m32r target.
And it becomes to match a rule of optimizations too.

GCC mainline status is stage3 now. I think to apply this patch is a better way.
Please commit this patch.

gcc/ChangeLog

2005-09-07 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>

	* config/m32r.md (movmemsi_internal): Changed movmemsi_internal
	for PR23747.

Index: m32r.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m32r/m32r.md,v
retrieving revision 1.56
diff -u -p -r1.56 m32r.md
--- m32r.md	25 Jun 2005 01:21:32 -0000	1.56
+++ m32r.md	7 Sep 2005 01:16:07 -0000
@@ -2558,8 +2558,8 @@
 	(mem:BLK (match_operand:SI 1 "register_operand" "r")))	;; source
    (use (match_operand:SI 2 "m32r_block_immediate_operand" "J"));; # bytes to move
    (set (match_operand:SI 3 "register_operand" "=0")
-	(plus:SI (match_dup 0)
-		 (minus (match_dup 2) (const_int 4))))
+	(plus:SI (minus (match_dup 2) (const_int 4))
+	         (match_dup 0)))
    (set (match_operand:SI 4 "register_operand" "=1")
 	(plus:SI (match_dup 1)
 		 (match_dup 2)))

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]