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[PATCH, committed] PowerPC DImode zero_extend mode macro conversion
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Mon, 15 Aug 2005 14:01:22 -0400
- Subject: [PATCH, committed] PowerPC DImode zero_extend mode macro conversion
This patch converts the zero_extend patterns to use mode macros.
Bootstrapped and regression tested on powerpc-ibm-aix5.2.0.0
David
* config/rs6000/rs6000.md (QHSI): New mode macro.
(wd): Extend mode attr for QImode and HImode
(dbits): New mode attr.
(zero_extend<mode>di2): Convert to mode macro.
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.395
diff -c -p -r1.395 rs6000.md
*** rs6000.md 13 Aug 2005 18:47:08 -0000 1.395
--- rs6000.md 13 Aug 2005 19:00:46 -0000
***************
*** 134,139 ****
--- 134,142 ----
; Any supported integer mode that fits in one register.
(define_mode_macro INT1 [QI HI SI (DI "TARGET_POWERPC64")])
+ ; extend modes for DImode
+ (define_mode_macro QHSI [QI HI SI])
+
; SImode or DImode, even if DImode doesn't fit in GPRs.
(define_mode_macro SDI [SI DI])
***************
*** 149,190 ****
; Various instructions that come in SI and DI forms.
; A generic w/d attribute, for things like cmpw/cmpd.
! (define_mode_attr wd [(SI "w") (DI "d")])
;; Start with fixed-point load and store insns. Here we put only the more
;; complex forms. Basic data transfer is done later.
! (define_expand "zero_extendqidi2"
[(set (match_operand:DI 0 "gpc_reg_operand" "")
! (zero_extend:DI (match_operand:QI 1 "gpc_reg_operand" "")))]
"TARGET_POWERPC64"
"")
! (define_insn ""
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
! (zero_extend:DI (match_operand:QI 1 "reg_or_mem_operand" "m,r")))]
"TARGET_POWERPC64"
"@
! lbz%U1%X1 %0,%1
! rldicl %0,%1,0,56"
[(set_attr "type" "load,*")])
! (define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
! (compare:CC (zero_extend:DI (match_operand:QI 1 "gpc_reg_operand" "r,r"))
(const_int 0)))
(clobber (match_scratch:DI 2 "=r,r"))]
"TARGET_64BIT"
"@
! rldicl. %2,%1,0,56
#"
[(set_attr "type" "compare")
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
! (compare:CC (zero_extend:DI (match_operand:QI 1 "gpc_reg_operand" ""))
(const_int 0)))
(clobber (match_scratch:DI 2 ""))]
"TARGET_POWERPC64 && reload_completed"
--- 152,196 ----
; Various instructions that come in SI and DI forms.
; A generic w/d attribute, for things like cmpw/cmpd.
! (define_mode_attr wd [(QI "b") (HI "h") (SI "w") (DI "d")])
!
! ; DImode bits
! (define_mode_attr dbits [(QI "56") (HI "48") (SI "32")])
;; Start with fixed-point load and store insns. Here we put only the more
;; complex forms. Basic data transfer is done later.
! (define_expand "zero_extend<mode>di2"
[(set (match_operand:DI 0 "gpc_reg_operand" "")
! (zero_extend:DI (match_operand:QHSI 1 "gpc_reg_operand" "")))]
"TARGET_POWERPC64"
"")
! (define_insn "*zero_extend<mode>di2_internal1"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
! (zero_extend:DI (match_operand:QHSI 1 "reg_or_mem_operand" "m,r")))]
"TARGET_POWERPC64"
"@
! l<wd>z%U1%X1 %0,%1
! rldicl %0,%1,0,<dbits>"
[(set_attr "type" "load,*")])
! (define_insn "*zero_extend<mode>di2_internal2"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
! (compare:CC (zero_extend:DI (match_operand:QHSI 1 "gpc_reg_operand" "r,r"))
(const_int 0)))
(clobber (match_scratch:DI 2 "=r,r"))]
"TARGET_64BIT"
"@
! rldicl. %2,%1,0,<dbits>
#"
[(set_attr "type" "compare")
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
! (compare:CC (zero_extend:DI (match_operand:QHSI 1 "gpc_reg_operand" ""))
(const_int 0)))
(clobber (match_scratch:DI 2 ""))]
"TARGET_POWERPC64 && reload_completed"
***************
*** 195,216 ****
(const_int 0)))]
"")
! (define_insn ""
[(set (match_operand:CC 2 "cc_reg_operand" "=x,?y")
! (compare:CC (zero_extend:DI (match_operand:QI 1 "gpc_reg_operand" "r,r"))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(zero_extend:DI (match_dup 1)))]
"TARGET_64BIT"
"@
! rldicl. %0,%1,0,56
#"
[(set_attr "type" "compare")
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 2 "cc_reg_not_cr0_operand" "")
! (compare:CC (zero_extend:DI (match_operand:QI 1 "gpc_reg_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "")
(zero_extend:DI (match_dup 1)))]
--- 201,222 ----
(const_int 0)))]
"")
! (define_insn "*zero_extend<mode>di2_internal3"
[(set (match_operand:CC 2 "cc_reg_operand" "=x,?y")
! (compare:CC (zero_extend:DI (match_operand:QHSI 1 "gpc_reg_operand" "r,r"))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(zero_extend:DI (match_dup 1)))]
"TARGET_64BIT"
"@
! rldicl. %0,%1,0,<dbits>
#"
[(set_attr "type" "compare")
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 2 "cc_reg_not_cr0_operand" "")
! (compare:CC (zero_extend:DI (match_operand:QHSI 1 "gpc_reg_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "")
(zero_extend:DI (match_dup 1)))]
***************
*** 280,352 ****
(const_int 0)))]
"")
- (define_expand "zero_extendhidi2"
- [(set (match_operand:DI 0 "gpc_reg_operand" "")
- (zero_extend:DI (match_operand:HI 1 "gpc_reg_operand" "")))]
- "TARGET_POWERPC64"
- "")
-
- (define_insn ""
- [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
- (zero_extend:DI (match_operand:HI 1 "reg_or_mem_operand" "m,r")))]
- "TARGET_POWERPC64"
- "@
- lhz%U1%X1 %0,%1
- rldicl %0,%1,0,48"
- [(set_attr "type" "load,*")])
-
- (define_insn ""
- [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
- (compare:CC (zero_extend:DI (match_operand:HI 1 "gpc_reg_operand" "r,r"))
- (const_int 0)))
- (clobber (match_scratch:DI 2 "=r,r"))]
- "TARGET_64BIT"
- "@
- rldicl. %2,%1,0,48
- #"
- [(set_attr "type" "compare")
- (set_attr "length" "4,8")])
-
- (define_split
- [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
- (compare:CC (zero_extend:DI (match_operand:HI 1 "gpc_reg_operand" ""))
- (const_int 0)))
- (clobber (match_scratch:DI 2 ""))]
- "TARGET_POWERPC64 && reload_completed"
- [(set (match_dup 2)
- (zero_extend:DI (match_dup 1)))
- (set (match_dup 0)
- (compare:CC (match_dup 2)
- (const_int 0)))]
- "")
-
- (define_insn ""
- [(set (match_operand:CC 2 "cc_reg_operand" "=x,?y")
- (compare:CC (zero_extend:DI (match_operand:HI 1 "gpc_reg_operand" "r,r"))
- (const_int 0)))
- (set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
- (zero_extend:DI (match_dup 1)))]
- "TARGET_64BIT"
- "@
- rldicl. %0,%1,0,48
- #"
- [(set_attr "type" "compare")
- (set_attr "length" "4,8")])
-
- (define_split
- [(set (match_operand:CC 2 "cc_reg_not_cr0_operand" "")
- (compare:CC (zero_extend:DI (match_operand:HI 1 "gpc_reg_operand" ""))
- (const_int 0)))
- (set (match_operand:DI 0 "gpc_reg_operand" "")
- (zero_extend:DI (match_dup 1)))]
- "TARGET_POWERPC64 && reload_completed"
- [(set (match_dup 0)
- (zero_extend:DI (match_dup 1)))
- (set (match_dup 2)
- (compare:CC (match_dup 0)
- (const_int 0)))]
- "")
-
(define_expand "extendhidi2"
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(sign_extend:DI (match_operand:HI 1 "gpc_reg_operand" "")))]
--- 286,291 ----
***************
*** 414,486 ****
(const_int 0)))]
"")
- (define_expand "zero_extendsidi2"
- [(set (match_operand:DI 0 "gpc_reg_operand" "")
- (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" "")))]
- "TARGET_POWERPC64"
- "")
-
- (define_insn ""
- [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
- (zero_extend:DI (match_operand:SI 1 "reg_or_mem_operand" "m,r")))]
- "TARGET_POWERPC64"
- "@
- lwz%U1%X1 %0,%1
- rldicl %0,%1,0,32"
- [(set_attr "type" "load,*")])
-
- (define_insn ""
- [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
- (compare:CC (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" "r,r"))
- (const_int 0)))
- (clobber (match_scratch:DI 2 "=r,r"))]
- "TARGET_64BIT"
- "@
- rldicl. %2,%1,0,32
- #"
- [(set_attr "type" "compare")
- (set_attr "length" "4,8")])
-
- (define_split
- [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
- (compare:CC (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" ""))
- (const_int 0)))
- (clobber (match_scratch:DI 2 ""))]
- "TARGET_POWERPC64 && reload_completed"
- [(set (match_dup 2)
- (zero_extend:DI (match_dup 1)))
- (set (match_dup 0)
- (compare:CC (match_dup 2)
- (const_int 0)))]
- "")
-
- (define_insn ""
- [(set (match_operand:CC 2 "cc_reg_operand" "=x,?y")
- (compare:CC (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" "r,r"))
- (const_int 0)))
- (set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
- (zero_extend:DI (match_dup 1)))]
- "TARGET_64BIT"
- "@
- rldicl. %0,%1,0,32
- #"
- [(set_attr "type" "compare")
- (set_attr "length" "4,8")])
-
- (define_split
- [(set (match_operand:CC 2 "cc_reg_not_cr0_operand" "")
- (compare:CC (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" ""))
- (const_int 0)))
- (set (match_operand:DI 0 "gpc_reg_operand" "")
- (zero_extend:DI (match_dup 1)))]
- "TARGET_POWERPC64 && reload_completed"
- [(set (match_dup 0)
- (zero_extend:DI (match_dup 1)))
- (set (match_dup 2)
- (compare:CC (match_dup 0)
- (const_int 0)))]
- "")
-
(define_expand "extendsidi2"
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(sign_extend:DI (match_operand:SI 1 "gpc_reg_operand" "")))]
--- 353,358 ----