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[RFC] x87/MMX register life info
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: rth at redhat dot com
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Thu, 7 Jul 2005 14:30:32 +0200
- Subject: [RFC] x87/MMX register life info
- Reply-to: Uros Bizjak <ubizjak at gmail dot com>
Hello!
Following changes are needed to get correct MMX/x87 register life info:
==== i386-protos.h ====
extern rtx ix86_call_insn_sets (rtx);
extern rtx ix86_call_insn_uses (rtx);
==== i386.h ====
#define CALL_INSN_SETS(INSN) ix86_call_insn_sets (INSN)
#define CALL_INSN_USES(INSN) ix86_call_insn_uses (INSN)
==== i386.c ====
rtx
ix86_call_insn_sets (rtx insn)
{
rtx reg;
int mode;
int regno = 0;
reg = SET_DEST (PATTERN (insn));
if (reg)
{
if (MMX_REG_P (reg))
regno = FIRST_FLOAT_REG;
if (FP_REG_P (reg))
regno = FIRST_MMX_REG;
}
if (! regno)
{
mode = ix86_mode_needed (I387_FPU_MODE, insn);
regno = (mode == FPU_MODE_MMX) ? FIRST_FLOAT_REG : FIRST_MMX_REG;
}
return gen_rtx_REG (ALLREGSmode, regno);
}
So, for these testcases:
---cut here---
typedef int __m64 __attribute__ ((__vector_size__ (8)));
extern float float_from_si64 (__m64 i);
extern float float_from_float (float f);
extern __m64 si64_from_float (float f);
extern __m64 si64_from_si64 (__m64 i);
float f_i (__m64 i)
{
return float_from_si64 (i);
}
float f_f (float f)
{
return float_from_float (f);
}
__m64 i_f (float f)
{
return si64_from_float (f);
}
__m64 i_i (__m64 i)
{
return si64_from_si64 (i);
}
---cut here---
We got following (slightly edited) _.26.flow dumps:
;; Function f_i
Registers live at start: 6 [bp] 7 [sp] 8 [st] 9 [st(1)] 10 [st(2)] 11
[st(3)] 12 [st(4)] 13 [st(5)] 14 [st(6)] 15 [st(7)] 20 [frame] 29
[mm0]
Registers live at end: 6 [bp] 7 [sp] 8 [st] 20 [frame] 29 [mm0] 30
[mm1] 31 [mm2] 32 [mm3] 33 [mm4] 34 [mm5] 35 [mm6] 36 [mm7]
;; Start of basic block 0, registers live: 6 [bp] 7 [sp] 8 [st] 9
[st(1)] 10 [st(2)] 11 [st(3)] 12 [st(4)] 13 [st(5)] 14 [st(6)] 15
[st(7)] 20 [frame] 29 [mm0]
(note:HI 9 2 32 0 [bb 0] NOTE_INSN_BASIC_BLOCK)
(call_insn/j:HI 13 35 14 0 (set (reg:SF 8 st)
(call (mem:QI (symbol_ref:SI ("float_from_si64") [flags 0x41]
<function_decl 0x402b921c float_from_si64>) [0 S1 A8])
(const_int 0 [0x0]))) 526 {*call_value_0}
(insn_list:REG_DEP_TRUE 12 (nil))
(expr_list:REG_DEAD (reg:XF 15 st(7))
(expr_list:REG_DEAD (reg:XF 14 st(6))
(expr_list:REG_DEAD (reg:XF 13 st(5))
(expr_list:REG_DEAD (reg:XF 12 st(4))
(expr_list:REG_DEAD (reg:XF 11 st(3))
(expr_list:REG_DEAD (reg:XF 10 st(2))
(expr_list:REG_DEAD (reg:XF 9 st(1))
(nil))))))))
(expr_list:REG_DEP_TRUE (use (reg:V2SI 29 mm0 [ i ]))
(nil)))
;; End of basic block 0, registers live:
6 [bp] 7 [sp] 8 [st] 20 [frame] 29 [mm0] 30 [mm1] 31 [mm2] 32 [mm3]
33 [mm4] 34 [mm5] 35 [mm6] 36 [mm7]
;; Function f_f
Registers live at start: 6 [bp] 7 [sp] 20 [frame] 29 [mm0] 30 [mm1] 31
[mm2] 32 [mm3] 33 [mm4] 34 [mm5] 35 [mm6] 36 [mm7]
Registers live at end: 6 [bp] 7 [sp] 8 [st] 20 [frame] 29 [mm0] 30
[mm1] 31 [mm2] 32 [mm3] 33 [mm4] 34 [mm5] 35 [mm6] 36 [mm7]
;; Start of basic block 0, registers live: 6 [bp] 7 [sp] 20 [frame] 29
[mm0] 30 [mm1] 31 [mm2] 32 [mm3] 33 [mm4] 34 [mm5] 35 [mm6] 36 [mm7]
(note:HI 6 2 29 0 [bb 0] NOTE_INSN_BASIC_BLOCK)
(call_insn/j:HI 10 32 11 0 (set (reg:SF 8 st)
(call (mem:QI (symbol_ref:SI ("float_from_float") [flags 0x41]
<function_decl 0x402b9360 float_from_float>) [0 S1 A8])
(const_int 4 [0x4]))) 526 {*call_value_0} (nil)
(nil)
(nil))
;; End of basic block 0, registers live:
6 [bp] 7 [sp] 8 [st] 20 [frame] 29 [mm0] 30 [mm1] 31 [mm2] 32 [mm3]
33 [mm4] 34 [mm5] 35 [mm6] 36 [mm7]
;; Function i_f
Registers live at start: 6 [bp] 7 [sp] 8 [st] 9 [st(1)] 10 [st(2)] 11
[st(3)] 12 [st(4)] 13 [st(5)] 14 [st(6)] 15 [st(7)] 20 [frame]
Registers live at end: 6 [bp] 7 [sp] 8 [st] 9 [st(1)] 10 [st(2)] 11
[st(3)] 12 [st(4)] 13 [st(5)] 14 [st(6)] 15 [st(7)] 20 [frame] 29
[mm0]
(call_insn/j:HI 10 32 11 0 (set (reg:V2SI 29 mm0)
(call (mem:QI (symbol_ref:SI ("si64_from_float") [flags 0x41]
<function_decl 0x402b94a4 si64_from_float>) [0 S1 A8])
(const_int 4 [0x4]))) 526 {*call_value_0} (nil)
(nil)
(nil))
;; End of basic block 0, registers live:
6 [bp] 7 [sp] 8 [st] 9 [st(1)] 10 [st(2)] 11 [st(3)] 12 [st(4)] 13
[st(5)] 14 [st(6)] 15 [st(7)] 20 [frame] 29 [mm0]
;; Function i_i
Registers live at start: 6 [bp] 7 [sp] 8 [st] 9 [st(1)] 10 [st(2)] 11
[st(3)] 12 [st(4)] 13 [st(5)] 14 [st(6)] 15 [st(7)] 20 [frame] 29
[mm0]
Registers live at end: 6 [bp] 7 [sp] 8 [st] 9 [st(1)] 10 [st(2)] 11
[st(3)] 12 [st(4)] 13 [st(5)] 14 [st(6)] 15 [st(7)] 20 [frame] 29
[mm0]
(call_insn/j:HI 13 35 14 0 (set (reg:V2SI 29 mm0)
(call (mem:QI (symbol_ref:SI ("si64_from_si64") [flags 0x41]
<function_decl 0x402b95e8 si64_from_si64>) [0 S1 A8])
(const_int 0 [0x0]))) 526 {*call_value_0}
(insn_list:REG_DEP_TRUE 12 (nil))
(nil)
(expr_list:REG_DEP_TRUE (use (reg:V2SI 29 mm0 [ i ]))
(nil)))
;; End of basic block 0, registers live:
6 [bp] 7 [sp] 8 [st] 9 [st(1)] 10 [st(2)] 11 [st(3)] 12 [st(4)] 13
[st(5)] 14 [st(6)] 15 [st(7)] 20 [frame] 29 [mm0]
Uros.