This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] Exploiting dual mode operation, implementation.


On Jun 24, 2005 11:44 AM, Leehod Baruch <sleehodb@t2.technion.ac.il> wrote:

> > In addition, PRE doesn't handle PARALLELs, but I think that the part
> > of the pass before combine, where you insert sign-extends, may add
> > PARALLELs on e.g. x86.
> Why should this happen? I'm just emitting a simple instruction before 
> another instruction. If this realy happens, I believe that the PRE 
> won't be the only problem.

There certainly are other parts in the compiler where it can be a
problem, though most passes, AFAICT, do handle PARALLELs.  But gcse PRE
does not.  The extra sign-extend insns you emit can still be parallels
when the extra clobbers are added.  See e.g. the extendsidi2 insns in
i386.md.

Gr.
Steven



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]