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Re: [PATCH] Exploiting dual mode operation, implementation.
- From: Steven Bosscher <stevenb at suse dot de>
- To: Leehod Baruch <sleehodb at t2 dot technion dot ac dot il>
- Cc: Leehod Baruch <LEEHOD at il dot ibm dot com>, gcc-patches at gcc dot gnu dot org,Mircea Namolaru <NAMOLARU at il dot ibm dot com>,Mostafa Hagog <MUSTAFA at il dot ibm dot com>, jh at suse dot cz
- Date: Fri, 24 Jun 2005 12:58:57 +0200 (CEST)
- Subject: Re: [PATCH] Exploiting dual mode operation, implementation.
- References: <1119606284.42bbd60cba90e@webmail.technion.ac.il>
On Jun 24, 2005 11:44 AM, Leehod Baruch <sleehodb@t2.technion.ac.il> wrote:
> > In addition, PRE doesn't handle PARALLELs, but I think that the part
> > of the pass before combine, where you insert sign-extends, may add
> > PARALLELs on e.g. x86.
> Why should this happen? I'm just emitting a simple instruction before
> another instruction. If this realy happens, I believe that the PRE
> won't be the only problem.
There certainly are other parts in the compiler where it can be a
problem, though most passes, AFAICT, do handle PARALLELs. But gcse PRE
does not. The extra sign-extend insns you emit can still be parallels
when the extra clobbers are added. See e.g. the extendsidi2 insns in
i386.md.
Gr.
Steven