Re: PR rtl-optimization/15248 -- semi-latent reload bug

[Joern RENNECKE <joern dot rennecke at st dot com>]

> I guess it's not. I've reverted it from mainline for now since it's 
apparently causing bootstrap failures. I'd welcome any help in tracking 
this down since I can't reproduce it on my machine.

I've read through your patch and noted some points:

> *************** reload (rtx first, int global)
> *** 752,758 ****
>   		     for equivalences.  This is overly conservative as
>   		     we could find all sets of the destination pseudo
>   		     and remove them as they should be redundant.  */
> ! 		  if (memory_operand (x, VOIDmode) && ! MEM_READONLY_P (x))
>   		    {
>   		      /* Always unshare the equivalence, so we can
>   			 substitute into this insn without touching the
> --- 752,758 ----
>   		     for equivalences.  This is overly conservative as
>   		     we could find all sets of the destination pseudo
>   		     and remove them as they should be redundant.  */
> ! 		  if (memory_operand (x, VOIDmode))
>   		    {
>   		      /* Always unshare the equivalence, so we can
>   			 substitute into this insn without touching the

The comment needs updating.

> *************** reload (rtx first, int global)
> *** 787,800 ****
>                 else
>                   continue;
>
> !               /* If this register is being made equivalent to a MEM
> !                  and the MEM is not SET_SRC, the equivalencing insn
> !                  is one with the MEM as a SET_DEST and it occurs later.
> !                  So don't mark this insn now.  */
> !               if (!MEM_P (x)
> !                   || rtx_equal_p (SET_SRC (set), x))
> !                 reg_equiv_init[i]
> !                   = gen_rtx_INSN_LIST (VOIDmode, insn, 
reg_equiv_init[i]);
>               }
>           }
>       }
> --- 787,794 ----
>                 else
>                   continue;
>
> !               reg_equiv_init[i]
> !                 = gen_rtx_INSN_LIST (VOIDmode, insn, 
reg_equiv_init[i]);
>               }
>           }
>       }

The original comment was probably true when considering execution time, 
but not
necessarily when looking at the static instructions.  We might see the 
true equivalencing
instruction before we see the spurious one.  So your later change to 
ignore insns put
into the list previously might be ineffective.  A possible solution 
would be to look here
if reg_equiv_init already constains an insn with MEM as SET_DEST.