Re: [Committed] PR15422: x87 "double swap" problem in reg-stack

[Uros Bizjak <uros at kss-loka dot si>]

Hello Roger!

> Now that reg-stack.c has been reorganized into two passes, the following
> small patch is sufficient to fix PR rtl-optimization/15422 which is the
> infamous double fxch problem.

Wow, excellent!

> foo:
>        fldl    4(%esp)
>        fldl    12(%esp)
>        fxch    %st(1)
> .L2:    fprem
>
> where the remaining fxch has been hoisted out of the loop.  This still
> isn't ideal as the initial basic block would have been better to load
> 12(%esp) before 4(%esp) rather than just swapping them afterwards, but
> that's the topic of a follow-up optimization.
There is an enhancement PR filled (PR15492) that has some examples, 
where floating-point arguments are loaded to stack in wrong order. In 
comment #3, there is a piece of code  that confuses insn scheduler to 
emit lots of unpairable fxch insns. To partially solve the problems, the 
insn scheduler was disabled for pentium4, but the bug is still there.

The scheduler has a (bad in stacked reg case) habit to load all 
arguments to stack as soon as possible. It seems that the data, where 
instructions wants their argument on the stack (as in your case with 
fprem insn) is not taken into account, so these early loads are 
compensated with lots of those blidnly-inserted fxchs. This problem is 
somehow masked by the fact that arithmetic FP operators could have one 
of their operands a memory operan that could be loaded directly from 
memory and thus bypassing the stack. However, with lots of  x87 
intrinsics in place (in -ffast-math case) that have "strong 
constraints", an (unpairable) fxch is usually emitted just before (i.e.) 
fabs, fsqrt, fsin, to make things as bad as possible ;(

Uros.