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Re: [patch] MIPS: add mips32r2 patterns to generate ext and ins insns.


David Ung <davidu@mips.com> writes:
> + /* Return true if we can use the MIPS32/64 R2 ext/ins instructions.
> +    Return false if OP is not in a register.
> +    MIPS ins/ext insns don't support zero length bitfields or fields
> +    extending beyond the left or right-most bits.
> +    To be valid, the values of POSITION and SIZE must satisfy all of
> +    the following:
> +      0 <= POSITION < BITS_PER_WORD
> +      0 < SIZE <= BITS_PER_WORD
> +      0 < POSITION + SIZE <= BITS_PER_WORD
> +    Additionally, we reject lengths equal to a word as they are better
> +    handled by the move patterns.  */

This still doesn't say that SIZE and POSITION are operands to
a zero_extend.  I'd prefer:

/* Return true if (zero_extend OP SIZE POSITION) can be used as the
   source of an "ext" instruction or the destination of an "ins"
   instruction.  OP must be a register operand and the following
   conditions must hold:

     0 <= POSITION < BITS_PER_WORD
     0 < SIZE <= BITS_PER_WORD
     0 < POSITION + SIZE <= BITS_PER_WORD

   Also reject lengths equal to a word as they are better handled
   by the move patterns.  */

OK with that change.

Richard


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