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[csl-arm] Allow negsf2, negdf2 expanders with VFP


Hi,

This patch enables the machine-description patterns for negsf2, negdf2 for the ARM VFP. It is backported from mainline:

http://gcc.gnu.org/ml/gcc-patches/2005-05/msg00976.html

Tested on arm-none-elf.

OK to apply on csl-arm?

ChangeLog:

  * config/arm/arm.md (negsf2, negdf2): Permit these expands when
  compiling for VFP.
Index: gcc/config/arm/arm.md
===================================================================
RCS file: /home/gcc/repos/gcc/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.145.2.32
diff -c -p -r1.145.2.32 arm.md
*** gcc/config/arm/arm.md	26 Apr 2005 18:21:28 -0000	1.145.2.32
--- gcc/config/arm/arm.md	11 May 2005 21:20:11 -0000
***************
*** 2876,2889 ****
  (define_expand "negsf2"
    [(set (match_operand:SF         0 "s_register_operand" "")
  	(neg:SF (match_operand:SF 1 "s_register_operand" "")))]
!   "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
    ""
  )
  
  (define_expand "negdf2"
    [(set (match_operand:DF         0 "s_register_operand" "")
  	(neg:DF (match_operand:DF 1 "s_register_operand" "")))]
!   "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
    "")
  
  ;; abssi2 doesn't really clobber the condition codes if a different register
--- 2876,2889 ----
  (define_expand "negsf2"
    [(set (match_operand:SF         0 "s_register_operand" "")
  	(neg:SF (match_operand:SF 1 "s_register_operand" "")))]
!   "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
    ""
  )
  
  (define_expand "negdf2"
    [(set (match_operand:DF         0 "s_register_operand" "")
  	(neg:DF (match_operand:DF 1 "s_register_operand" "")))]
!   "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
    "")
  
  ;; abssi2 doesn't really clobber the condition codes if a different register

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