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Re: [s390] macros patch 2/11


Hi,

Here is the second patch, dealing with strlen, movmem and clrmem patterns.


2005-05-09  Adrian Straetling  <straetling@de.ibm.com>

	* config/s390/s390.md: ("GPR", "P"): New mode macros.
	("cmpdi", "cmpsi"): Merge.
	("strlendi", "strlensi"): Merge.
	("*strlendi", "*strlensi"): Merge.
	("movmemdi", "movmemsi"): Merge.
	("clrmemdi", "clrmemsi"): Merge.
	

Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig	2005-05-04 15:44:45.000000000 +0200
--- gcc/config/s390/s390.md	2005-05-04 16:08:10.311486453 +0200
***************
*** 235,240 ****
--- 235,248 ----
  
  ;; Macros
  
+ ;; This mode macro allows 31-bit and 64-bit GPR patterns to be generated
+ ;; from the same template.
+ (define_mode_macro GPR [(DI "TARGET_64BIT") SI])
+ 
+ ;; This mode macro allows :P to be used for patterns that operate on
+ ;; pointer-sized quantities.  Exactly one of the two alternatives will match.
+ (define_mode_macro P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")])
+ 
  ;; This mode macro allows the QI and HI patterns to be defined from
  ;; the same template.
  (define_mode_macro HQI [HI QI])
***************
*** 256,276 ****
  ;;- Compare instructions.
  ;;
  
! (define_expand "cmpdi"
    [(set (reg:CC 33)
!         (compare:CC (match_operand:DI 0 "register_operand" "")
!                     (match_operand:DI 1 "general_operand" "")))]
!   "TARGET_64BIT"
! {
!   s390_compare_op0 = operands[0];
!   s390_compare_op1 = operands[1];
!   DONE;
! })
! 
! (define_expand "cmpsi"
!   [(set (reg:CC 33)
!         (compare:CC (match_operand:SI 0 "register_operand" "")
!                     (match_operand:SI 1 "general_operand" "")))]
    ""
  {
    s390_compare_op0 = operands[0];
--- 264,273 ----
  ;;- Compare instructions.
  ;;
  
! (define_expand "cmp<mode>"
    [(set (reg:CC 33)
!         (compare:CC (match_operand:GPR 0 "register_operand" "")
!                     (match_operand:GPR 1 "general_operand" "")))]
    ""
  {
    s390_compare_op0 = operands[0];
***************
*** 1731,1802 ****
  ; strlenM instruction pattern(s).
  ;
  
! (define_expand "strlendi"
!   [(set (reg:QI 0) (match_operand:QI 2 "immediate_operand" ""))
!    (parallel
!     [(set (match_dup 4)
! 	  (unspec:DI [(const_int 0)
! 		      (match_operand:BLK 1 "memory_operand" "")
! 		      (reg:QI 0)
! 		      (match_operand 3 "immediate_operand" "")] UNSPEC_SRST))
!      (clobber (scratch:DI))
!      (clobber (reg:CC 33))])
!    (parallel
!     [(set (match_operand:DI 0 "register_operand" "")
!           (minus:DI (match_dup 4) (match_dup 5)))
!      (clobber (reg:CC 33))])]
!   "TARGET_64BIT"
! {
!   operands[4] = gen_reg_rtx (DImode);
!   operands[5] = gen_reg_rtx (DImode);
!   emit_move_insn (operands[5], force_operand (XEXP (operands[1], 0), NULL_RTX));
!   operands[1] = replace_equiv_address (operands[1], operands[5]);
! })
! 
! (define_insn "*strlendi"
!   [(set (match_operand:DI 0 "register_operand" "=a")
! 	(unspec:DI [(match_operand:DI 2 "general_operand" "0")
! 		    (mem:BLK (match_operand:DI 3 "register_operand" "1"))
! 		    (reg:QI 0)
! 		    (match_operand 4 "immediate_operand" "")] UNSPEC_SRST))
!    (clobber (match_scratch:DI 1 "=a"))
!    (clobber (reg:CC 33))]
!   "TARGET_64BIT"
!   "srst\t%0,%1\;jo\t.-4"
!   [(set_attr "length" "8")
!    (set_attr "type" "vs")])
! 
! (define_expand "strlensi"
    [(set (reg:QI 0) (match_operand:QI 2 "immediate_operand" ""))
     (parallel
      [(set (match_dup 4)
! 	  (unspec:SI [(const_int 0)
  		      (match_operand:BLK 1 "memory_operand" "")
  		      (reg:QI 0)
  		      (match_operand 3 "immediate_operand" "")] UNSPEC_SRST))
!      (clobber (scratch:SI))
       (clobber (reg:CC 33))])
     (parallel
!     [(set (match_operand:SI 0 "register_operand" "")
!           (minus:SI (match_dup 4) (match_dup 5)))
       (clobber (reg:CC 33))])]
!   "!TARGET_64BIT"
  {
!   operands[4] = gen_reg_rtx (SImode);
!   operands[5] = gen_reg_rtx (SImode);
    emit_move_insn (operands[5], force_operand (XEXP (operands[1], 0), NULL_RTX));
    operands[1] = replace_equiv_address (operands[1], operands[5]);
  })
  
! (define_insn "*strlensi"
!   [(set (match_operand:SI 0 "register_operand" "=a")
! 	(unspec:SI [(match_operand:SI 2 "general_operand" "0")
! 		    (mem:BLK (match_operand:SI 3 "register_operand" "1"))
  		    (reg:QI 0)
  		    (match_operand 4 "immediate_operand" "")] UNSPEC_SRST))
!    (clobber (match_scratch:SI 1 "=a"))
     (clobber (reg:CC 33))]
!   "!TARGET_64BIT"
    "srst\t%0,%1\;jo\t.-4"
    [(set_attr "length" "8")
     (set_attr "type" "vs")])
--- 1728,1764 ----
  ; strlenM instruction pattern(s).
  ;
  
! (define_expand "strlen<mode>"
    [(set (reg:QI 0) (match_operand:QI 2 "immediate_operand" ""))
     (parallel
      [(set (match_dup 4)
! 	  (unspec:P [(const_int 0)
  		      (match_operand:BLK 1 "memory_operand" "")
  		      (reg:QI 0)
  		      (match_operand 3 "immediate_operand" "")] UNSPEC_SRST))
!      (clobber (scratch:P))
       (clobber (reg:CC 33))])
     (parallel
!     [(set (match_operand:P 0 "register_operand" "")
!           (minus:P (match_dup 4) (match_dup 5)))
       (clobber (reg:CC 33))])]
!   ""
  {
!   operands[4] = gen_reg_rtx (Pmode);
!   operands[5] = gen_reg_rtx (Pmode);
    emit_move_insn (operands[5], force_operand (XEXP (operands[1], 0), NULL_RTX));
    operands[1] = replace_equiv_address (operands[1], operands[5]);
  })
  
! (define_insn "*strlen<mode>"
!   [(set (match_operand:P 0 "register_operand" "=a")
! 	(unspec:P [(match_operand:P 2 "general_operand" "0")
! 		    (mem:BLK (match_operand:P 3 "register_operand" "1"))
  		    (reg:QI 0)
  		    (match_operand 4 "immediate_operand" "")] UNSPEC_SRST))
!    (clobber (match_scratch:P 1 "=a"))
     (clobber (reg:CC 33))]
!   ""
    "srst\t%0,%1\;jo\t.-4"
    [(set_attr "length" "8")
     (set_attr "type" "vs")])
***************
*** 1805,1822 ****
  ; movmemM instruction pattern(s).
  ;
  
! (define_expand "movmemdi"
    [(set (match_operand:BLK 0 "memory_operand" "")
          (match_operand:BLK 1 "memory_operand" ""))
!    (use (match_operand:DI 2 "general_operand" ""))
!    (match_operand 3 "" "")]
!   "TARGET_64BIT"
!   "s390_expand_movmem (operands[0], operands[1], operands[2]); DONE;")
! 
! (define_expand "movmemsi"
!   [(set (match_operand:BLK 0 "memory_operand" "")
!         (match_operand:BLK 1 "memory_operand" ""))
!    (use (match_operand:SI 2 "general_operand" ""))
     (match_operand 3 "" "")]
    ""
    "s390_expand_movmem (operands[0], operands[1], operands[2]); DONE;")
--- 1767,1776 ----
  ; movmemM instruction pattern(s).
  ;
  
! (define_expand "movmem<mode>"
    [(set (match_operand:BLK 0 "memory_operand" "")
          (match_operand:BLK 1 "memory_operand" ""))
!    (use (match_operand:GPR 2 "general_operand" ""))
     (match_operand 3 "" "")]
    ""
    "s390_expand_movmem (operands[0], operands[1], operands[2]); DONE;")
***************
*** 1951,1968 ****
  ; clrmemM instruction pattern(s).
  ;
  
! (define_expand "clrmemdi"
!   [(set (match_operand:BLK 0 "memory_operand" "")
!         (const_int 0))
!    (use (match_operand:DI 1 "general_operand" ""))
!    (match_operand 2 "" "")]
!   "TARGET_64BIT"
!   "s390_expand_clrmem (operands[0], operands[1]); DONE;")
! 
! (define_expand "clrmemsi"
    [(set (match_operand:BLK 0 "memory_operand" "")
          (const_int 0))
!    (use (match_operand:SI 1 "general_operand" ""))
     (match_operand 2 "" "")]
    ""
    "s390_expand_clrmem (operands[0], operands[1]); DONE;")
--- 1905,1914 ----
  ; clrmemM instruction pattern(s).
  ;
  
! (define_expand "clrmem<mode>"
    [(set (match_operand:BLK 0 "memory_operand" "")
          (const_int 0))
!    (use (match_operand:GPR 1 "general_operand" ""))
     (match_operand 2 "" "")]
    ""
    "s390_expand_clrmem (operands[0], operands[1]); DONE;")


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