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RFA: Use .opt files for the m32r port
- From: Richard Sandiford <rsandifo at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: nickc at redhat dot com
- Date: Wed, 23 Mar 2005 21:56:53 +0000
- Subject: RFA: Use .opt files for the m32r port
This patch makes the m32r port define its options using a .opt file.
Notes about the transition:
- -m32rx, -m32r2 and -m32r were in SUBTARGET_SWITCHES rather than
TARGET_SWITCHES, but despite the name, this macro was defined in
m32r.h and used by all targets. I've not put them in a separate
.opt file.
- Processor selection is done using two masks, one for -m32rx and one
for -m32r2. It's possible to set both using "-m32rx -m32r2" (true
both before and after the patch) but this doesn't seem to matter.
As far as I can tell, there are no differences between the two
options, either in terms of code generation or scheduling.
(They are of course different from TARGET_M32R.)
- Endianness was controlled by a target mask but there are no options
to change its setting. TARGET_LITTLE_ENDIAN is therefore fixed at
compile time. (This is despite the specs in little.h mentioning
options like -mbig-endian.)
Moving to .opt files means that masks are only allocated in response
to controling options, so I decided to make the constant nature of
TARGET_LITTLE_ENDIAN explicit. little.h now sets it to 1 and m32r.h
provides a default of 0. This should also help linux.h, which has
a preprocessor condition of "#if TARGET_LITTLE_ENDIAN".
- There is now no need to have global string variables for -mmodel=,
-msdata= and -mflush-trap=. I've therefore changed the default macro
settings from strings to enums or integers as appropriate.
- I've kept the -mrelax options commented out in the .opt file.
Tested by building m32r-elf and m32rle-linux-gnu. I also tried each
option by hand to make sure it had the intended effect. OK to install?
Richard
PS. I'll be taking a break for a week or so. I'll do more of the
.opt conversion when I get back.
* config/m32r/little.h (TARGET_ENDIAN_DEFAULT): Delete.
(TARGET_LITTLE_ENDIAN): New macro.
* config/m32r/m32r.h (SUBTARGET_SWITCHES, target_flags)
(TARGET_RELAX_MASK, TARGET_DEBUG_MASK, TARGET_DEBUG)
(TARGET_ALIGN_LOOPS_MASK, TARGET_ALIGN_LOOPS)
(TARGET_LOW_ISSUE_RATE_MASK, TARGET_LOW_ISSUE_RATE)
(TARGET_BRANCH_COST_MASK, TARGET_BRANCH_COST, TARGET_M32RX_MASK)
(TARGET_M32RX, TARGET_M32R2_MASK, TARGET_M32R2, LITTLE_ENDIAN_BIT)
(TARGET_ENDIAN_DEFAULT, SUBTARGET_SWITCHES, TARGET_DEFAULT)
(TARGET_SWITCHES, m32r_model_string, m32r_sdata_string)
(m32r_cache_flush_trap_string, SUBTARGET_OPTIONS)
(TARGET_OPTIONS): Delete.
(M32R_MODEL_DEFAULT, M32R_SDATA_DEFAULT): Turn into enums.
(CACHE_FLUSH_TRAP): Turn into an integer.
(TARGET_LITTLE_ENDIAN): Define to 0 by default.
(INITIALIZE_TRAMPOLINE): Check m32r_cache_trap >= 0 to see if
-mflush-trap is in use.
* config/m32r/m32r.c (m32r_model_string, m32r_sdata_string)
(m32r_cache_flush_trap_string): Delete.
(m32r_model) Initialize to M32R_MODEL_DEFAULT.
(m32r_sdata): Likewise M32R_SDATA_DEFAULT.
(m32r_cache_trap): Likewise CACHE_FLUSH_TRAP.
(TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults.
(m32r_handle_option): New function. Move -mflush-trap=, -mflush-func=,
-mmodel= and -msdata= handling from...
(m32r_init): ...here.
* config/m32r/m32r.opt: New file.
Index: config/m32r/little.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m32r/little.h,v
retrieving revision 1.2
diff -u -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.2 little.h
--- config/m32r/little.h 16 Apr 2004 10:30:32 -0000 1.2
+++ config/m32r/little.h 23 Mar 2005 21:44:47 -0000
@@ -19,7 +19,7 @@
Free Software Foundation, 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA. */
-#define TARGET_ENDIAN_DEFAULT LITTLE_ENDIAN_BIT
+#define TARGET_LITTLE_ENDIAN 1
#define CPP_ENDIAN_SPEC \
" %{mbe:-D__BIG_ENDIAN__} %{mbig-endian:-D__BIG_ENDIAN__}" \
Index: config/m32r/m32r.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m32r/m32r.h,v
retrieving revision 1.125
diff -u -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.125 m32r.h
--- config/m32r/m32r.h 30 Dec 2004 03:07:50 -0000 1.125
+++ config/m32r/m32r.h 23 Mar 2005 21:44:47 -0000
@@ -36,7 +36,6 @@
#undef LINK_SPEC
#undef STARTFILE_SPEC
#undef ENDFILE_SPEC
-#undef SUBTARGET_SWITCHES
#undef ASM_APP_ON
#undef ASM_APP_OFF
@@ -60,12 +59,6 @@ #define ASM_CPU_SPEC \
#define STARTFILE_CPU_SPEC "%{!shared:crt0.o%s} %{m32rx:m32rx/crtinit.o%s} %{!m32rx:crtinit.o%s}"
#define ENDFILE_CPU_SPEC "-lgloss %{m32rx:m32rx/crtfini.o%s} %{!m32rx:crtfini.o%s}"
-/* Extra machine dependent switches. */
-#define SUBTARGET_SWITCHES \
- { "32rx", TARGET_M32RX_MASK, "Compile for the m32rx" }, \
- { "32r2", TARGET_M32R2_MASK, "Compile for the m32r2" }, \
- { "32r", -(TARGET_M32RX_MASK+TARGET_M32R2_MASK), "" },
-
/* Define this macro as a C expression for the initializer of an array of
strings to tell the driver program which options are defaults for this
target and thus do not need to be handled specially when using
@@ -204,125 +197,22 @@ #define ENDFILE_SPEC "%(endfile_cpu)"
/* Run-time compilation parameters selecting different hardware subsets. */
-extern int target_flags;
-
-/* If nonzero, tell the linker to do relaxing.
- We don't do anything with the option, other than recognize it.
- LINK_SPEC handles passing -relax to the linker.
- This can cause incorrect debugging information as line numbers may
- turn out wrong. This shouldn't be specified unless accompanied with -O2
- [where the user expects debugging information to be less accurate]. */
-#define TARGET_RELAX_MASK (1 << 0)
-
-/* For miscellaneous debugging purposes. */
-#define TARGET_DEBUG_MASK (1 << 1)
-#define TARGET_DEBUG (target_flags & TARGET_DEBUG_MASK)
-
-/* Align loops to 32 byte boundaries (cache line size). */
-/* ??? This option is experimental and is not documented. */
-#define TARGET_ALIGN_LOOPS_MASK (1 << 2)
-#define TARGET_ALIGN_LOOPS (target_flags & TARGET_ALIGN_LOOPS_MASK)
-
-/* Change issue rate. */
-#define TARGET_LOW_ISSUE_RATE_MASK (1 << 3)
-#define TARGET_LOW_ISSUE_RATE (target_flags & TARGET_LOW_ISSUE_RATE_MASK)
-
-/* Change branch cost */
-#define TARGET_BRANCH_COST_MASK (1 << 4)
-#define TARGET_BRANCH_COST (target_flags & TARGET_BRANCH_COST_MASK)
-
-/* Target machine to compile for. */
-#define TARGET_M32R 1
-
-/* Support extended instruction set. */
-#define TARGET_M32RX_MASK (1 << 5)
-#define TARGET_M32RX (target_flags & TARGET_M32RX_MASK)
-#undef TARGET_M32R
-#define TARGET_M32R (! TARGET_M32RX)
-
-/* Support extended instruction set of m32r2. */
-#define TARGET_M32R2_MASK (1 << 6)
-#define TARGET_M32R2 (target_flags & TARGET_M32R2_MASK)
-#undef TARGET_M32R
#define TARGET_M32R (! TARGET_M32RX && ! TARGET_M32R2)
-/* Little Endian Flag. */
-#define LITTLE_ENDIAN_BIT (1 << 7)
-#define TARGET_LITTLE_ENDIAN (target_flags & LITTLE_ENDIAN_BIT)
-#define TARGET_BIG_ENDIAN (! TARGET_LITTLE_ENDIAN)
-
-/* This defaults us to big-endian. */
-#ifndef TARGET_ENDIAN_DEFAULT
-#define TARGET_ENDIAN_DEFAULT 0
+#ifndef TARGET_LITTLE_ENDIAN
+#define TARGET_LITTLE_ENDIAN 0
#endif
+#define TARGET_BIG_ENDIAN (! TARGET_LITTLE_ENDIAN)
/* This defaults us to m32r. */
#ifndef TARGET_CPU_DEFAULT
#define TARGET_CPU_DEFAULT 0
#endif
-/* Macro to define tables used to set the flags.
- This is a list in braces of pairs in braces,
- each pair being { "NAME", VALUE }
- where VALUE is the bits to set or minus the bits to clear.
- An empty string NAME is used to identify the default VALUE. */
-
-#ifndef SUBTARGET_SWITCHES
-#define SUBTARGET_SWITCHES
-#endif
-
-#ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT (TARGET_CPU_DEFAULT | TARGET_ENDIAN_DEFAULT)
-#endif
-
-#define TARGET_SWITCHES \
-{ \
-/* { "relax", TARGET_RELAX_MASK, "" }, \
- { "no-relax", -TARGET_RELAX_MASK, "" },*/ \
- { "debug", TARGET_DEBUG_MASK, \
- N_("Display compile time statistics") }, \
- { "align-loops", TARGET_ALIGN_LOOPS_MASK, \
- N_("Align all loops to 32 byte boundary") }, \
- { "no-align-loops", -TARGET_ALIGN_LOOPS_MASK, "" }, \
- { "issue-rate=1", TARGET_LOW_ISSUE_RATE_MASK, \
- N_("Only issue one instruction per cycle") }, \
- { "issue-rate=2", -TARGET_LOW_ISSUE_RATE_MASK, "" }, \
- { "branch-cost=1", TARGET_BRANCH_COST_MASK, \
- N_("Prefer branches over conditional execution") }, \
- { "branch-cost=2", -TARGET_BRANCH_COST_MASK, "" }, \
- SUBTARGET_SWITCHES \
- { "", TARGET_DEFAULT, "" } \
-}
-
-extern const char * m32r_model_string;
-extern const char * m32r_sdata_string;
-
/* Cache-flush support. */
extern const char * m32r_cache_flush_func;
-extern const char * m32r_cache_flush_trap_string;
extern int m32r_cache_flush_trap;
-#ifndef SUBTARGET_OPTIONS
-#define SUBTARGET_OPTIONS
-#endif
-
-#define TARGET_OPTIONS \
-{ \
- { "model=", & m32r_model_string, \
- N_("Code size: small, medium or large"), 0}, \
- { "sdata=", & m32r_sdata_string, \
- N_("Small data area: none, sdata, use"), 0}, \
- { "no-flush-func", & m32r_cache_flush_func, \
- N_("Don't call any cache flush functions") }, \
- { "flush-func=", & m32r_cache_flush_func, \
- N_("Specify cache flush function") }, \
- { "no-flush-trap", & m32r_cache_flush_trap_string, \
- N_("Don't call any cache flush trap") }, \
- { "flush-trap=", & m32r_cache_flush_trap_string, \
- N_("Specify cache flush trap number") } \
- SUBTARGET_OPTIONS \
-}
-
/* Code Models
Code models are used to select between two choices of two separate
@@ -357,7 +247,7 @@ #define TARGET_CALL32 (m32r_model
/* The default is the small model. */
#ifndef M32R_MODEL_DEFAULT
-#define M32R_MODEL_DEFAULT "small"
+#define M32R_MODEL_DEFAULT M32R_MODEL_SMALL
#endif
/* Small Data Area
@@ -407,7 +297,7 @@ #define TARGET_SDATA_USE (m32r_sdata =
/* Default is to disable the SDA
[for upward compatibility with previous toolchains]. */
#ifndef M32R_SDATA_DEFAULT
-#define M32R_SDATA_DEFAULT "none"
+#define M32R_SDATA_DEFAULT M32R_SDATA_NONE
#endif
/* Define this macro as a C expression for the initializer of an array of
@@ -1191,7 +1081,7 @@ L2: .word STATIC
#define CACHE_FLUSH_FUNC "_flush_cache"
#endif
#ifndef CACHE_FLUSH_TRAP
-#define CACHE_FLUSH_TRAP "12"
+#define CACHE_FLUSH_TRAP 12
#endif
/* Length in bytes of the trampoline for entering a nested function. */
@@ -1219,7 +1109,7 @@ #define INITIALIZE_TRAMPOLINE(TRAMP, FNA
(CXT)); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 20)), \
(FNADDR)); \
- if (m32r_cache_flush_trap_string && m32r_cache_flush_trap_string[0]) \
+ if (m32r_cache_flush_trap >= 0) \
emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)),\
GEN_INT (m32r_cache_flush_trap) )); \
else if (m32r_cache_flush_func && m32r_cache_flush_func[0]) \
Index: config/m32r/m32r.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m32r/m32r.c,v
retrieving revision 1.110
diff -u -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.110 m32r.c
--- config/m32r/m32r.c 30 Dec 2004 03:07:50 -0000 1.110
+++ config/m32r/m32r.c 23 Mar 2005 21:44:48 -0000
@@ -51,12 +51,10 @@ rtx m32r_compare_op0, m32r_compare_op1;
char m32r_punct_chars[256];
/* Selected code model. */
-const char * m32r_model_string = M32R_MODEL_DEFAULT;
-enum m32r_model m32r_model;
+enum m32r_model m32r_model = M32R_MODEL_DEFAULT;
/* Selected SDA support. */
-const char * m32r_sdata_string = M32R_SDATA_DEFAULT;
-enum m32r_sdata m32r_sdata;
+enum m32r_sdata m32r_sdata = M32R_SDATA_DEFAULT;
/* Machine-specific symbol_ref flags. */
#define SYMBOL_FLAG_MODEL_SHIFT SYMBOL_FLAG_MACH_DEP_SHIFT
@@ -69,17 +67,17 @@ #define LIT_NAME_P(NAME) ((NAME)[0] == '
/* Cache-flush support. Cache-flush is used at trampoline.
Default cache-flush is "trap 12".
default cache-flush function is "_flush_cache" (CACHE_FLUSH_FUNC)
- default cache-flush trap-interrupt number is "12". (CACHE_FLUSH_TRAP)
+ default cache-flush trap-interrupt number is 12 (CACHE_FLUSH_TRAP)
You can change how to generate code of cache-flush with following options.
- -flush-func=FLUSH-FUNC-NAME
- -no-flush-func
- -fluch-trap=TRAP-NUMBER
- -no-flush-trap. */
+ -mflush-func=FLUSH-FUNC-NAME
+ -mno-flush-func (sets m32r_cache_flush_func to NULL)
+ -mfluch-trap=TRAP-NUMBER
+ -mno-flush-trap. (sets m32r_cache_flush_trap to -1). */
const char *m32r_cache_flush_func = CACHE_FLUSH_FUNC;
-const char *m32r_cache_flush_trap_string = CACHE_FLUSH_TRAP;
-int m32r_cache_flush_trap = 12;
+int m32r_cache_flush_trap = CACHE_FLUSH_TRAP;
/* Forward declaration. */
+static bool m32r_handle_option (size_t, const char *, int);
static void init_reg_tables (void);
static void block_move_call (rtx, rtx, rtx);
static int m32r_is_insn (rtx);
@@ -127,6 +125,11 @@ #define TARGET_SCHED_ADJUST_PRIORITY m32
#undef TARGET_SCHED_ISSUE_RATE
#define TARGET_SCHED_ISSUE_RATE m32r_issue_rate
+#undef TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS TARGET_CPU_DEFAULT
+#undef TARGET_HANDLE_OPTION
+#define TARGET_HANDLE_OPTION m32r_handle_option
+
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO m32r_encode_section_info
#undef TARGET_IN_SMALL_DATA_P
@@ -152,6 +155,60 @@ #define TARGET_ARG_PARTIAL_BYTES m32r_ar
struct gcc_target targetm = TARGET_INITIALIZER;
+/* Implement TARGET_HANDLE_OPTION. */
+
+static bool
+m32r_handle_option (size_t code, const char *arg, int value)
+{
+ switch (code)
+ {
+ case OPT_m32r:
+ target_flags &= ~(MASK_M32R2 | MASK_M32RX);
+ return true;
+
+ case OPT_mmodel_:
+ if (strcmp (arg, "small") == 0)
+ m32r_model = M32R_MODEL_SMALL;
+ else if (strcmp (arg, "medium") == 0)
+ m32r_model = M32R_MODEL_MEDIUM;
+ else if (strcmp (arg, "large") == 0)
+ m32r_model = M32R_MODEL_LARGE;
+ else
+ return false;
+ return true;
+
+ case OPT_msdata_:
+ if (strcmp (arg, "none") == 0)
+ m32r_sdata = M32R_SDATA_NONE;
+ else if (strcmp (arg, "sdata") == 0)
+ m32r_sdata = M32R_SDATA_SDATA;
+ else if (strcmp (arg, "use") == 0)
+ m32r_sdata = M32R_SDATA_USE;
+ else
+ return false;
+ return true;
+
+ case OPT_mflush_func_:
+ m32r_cache_flush_func = arg;
+ return true;
+
+ case OPT_mno_flush_func:
+ m32r_cache_flush_func = NULL;
+ return true;
+
+ case OPT_mflush_trap_:
+ m32r_cache_flush_trap = value;
+ return m32r_cache_flush_trap <= 15;
+
+ case OPT_mno_flush_trap:
+ m32r_cache_flush_trap = -1;
+ return true;
+
+ default:
+ return true;
+ }
+}
+
/* Called by OVERRIDE_OPTIONS to initialize various things. */
void
@@ -167,33 +224,6 @@ m32r_init (void)
/* Provide default value if not specified. */
if (!g_switch_set)
g_switch_value = SDATA_DEFAULT_SIZE;
-
- if (strcmp (m32r_model_string, "small") == 0)
- m32r_model = M32R_MODEL_SMALL;
- else if (strcmp (m32r_model_string, "medium") == 0)
- m32r_model = M32R_MODEL_MEDIUM;
- else if (strcmp (m32r_model_string, "large") == 0)
- m32r_model = M32R_MODEL_LARGE;
- else
- error ("bad value (%s) for -mmodel switch", m32r_model_string);
-
- if (strcmp (m32r_sdata_string, "none") == 0)
- m32r_sdata = M32R_SDATA_NONE;
- else if (strcmp (m32r_sdata_string, "sdata") == 0)
- m32r_sdata = M32R_SDATA_SDATA;
- else if (strcmp (m32r_sdata_string, "use") == 0)
- m32r_sdata = M32R_SDATA_USE;
- else
- error ("bad value (%s) for -msdata switch", m32r_sdata_string);
-
- if (m32r_cache_flush_trap_string)
- {
- /* Change trap-number (12) for cache-flush to the others (0 - 15). */
- m32r_cache_flush_trap = atoi (m32r_cache_flush_trap_string);
- if (m32r_cache_flush_trap < 0 || m32r_cache_flush_trap > 15)
- error ("bad value (%s) for -flush-trap=n (0=<n<=15)",
- m32r_cache_flush_trap_string);
- }
}
/* Vectors to keep interesting information about registers where it can easily
diff -u /dev/null config/m32r/m32r.opt
--- /dev/null 2005-01-29 16:17:39.000000000 +0000
+++ config/m32r/m32r.opt 2005-03-23 20:50:42.035485754 +0000
@@ -0,0 +1,83 @@
+; Options for the Renesas M32R port of the compiler.
+
+; Copyright (C) 2005 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 2, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING. If not, write to the Free
+; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+; 02111-1307, USA.
+
+m32rx
+Target Report RejectNegative Mask(M32RX)
+Compile for the m32rx
+
+m32r2
+Target Report RejectNegative Mask(M32R2)
+Compile for the m32r2
+
+m32r
+Target RejectNegative
+Compile for the m32r
+
+malign-loops
+Target Report Mask(ALIGN_LOOPS)
+Align all loops to 32 byte boundary
+
+mbranch-cost=1
+Target Report RejectNegative Mask(BRANCH_COST)
+Prefer branches over conditional execution
+
+mbranch-cost=2
+Target Report RejectNegative InverseMask(BRANCH_COST)
+Give branches their default cost
+
+mdebug
+Target Mask(DEBUG)
+Display compile time statistics
+
+mflush-func=
+Target RejectNegative Joined
+Specify cache flush function
+
+mflush-trap=
+Target RejectNegative Joined UInteger
+Specify cache flush trap number
+
+missue-rate=1
+Target Report RejectNegative Mask(LOW_ISSUE_RATE)
+Only issue one instruction per cycle
+
+missue-rate=2
+Target Report RejectNegative InverseMask(LOW_ISSUE_RATE)
+Allow two instructions to be issued per cycle
+
+mmodel=
+Target RejectNegative Joined
+Code size: small, medium or large
+
+mno-flush-func
+Target RejectNegative
+Don't call any cache flush functions
+
+mno-flush-trap
+Target RejectNegative
+Don't call any cache flush trap
+
+; mrelax
+; Target Mask(RELAX)
+
+msdata=
+Target RejectNegative Joined
+Small data area: none, sdata, use