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RFA: Use .opt files for the c4x port
- From: Richard Sandiford <rsandifo at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: m dot hayes at elec dot canterbury dot ac dot nz
- Date: Sun, 20 Mar 2005 10:53:30 +0000
- Subject: RFA: Use .opt files for the c4x port
This patch uses a .opt file to define the c4x options. The conversion
was mostly straight-forward, the only really notable things being:
- There are two ways of setting the target architecture:
options like -m30, -m31, -m32, ..., each of which has its
own target_flags bit, and -mcpu=FOO, which has associated
string and integer variables. At the moment, override_options
folds the -mcpu=* stuff into target_flags, which the TARGET_C[34]*
macros then check.
After the conversion, it seemed more natural to use the integer
variable instead and to get handle_option to treat -m30 as a
synonym for -mcpu=30, -m31 as a synonym for -mcpu=31, etc.
This simplifies the code a little.
This change means that the TARGET_C[34]* macros now need access to
c4x_cpu_version, so I moved the declaration from c4x-protos.h to
c4x.h. I also moved c4x_rpts_cycles for consistency.
- Some of the TARGET_* macros are more complex than single-bit
target_flags checks. E.g. TARGET_PARALLEL_MPY is defined as:
(TARGET_PARALLEL && (target_flags & PARALLEL_MPY_FLAG))
I converted them to be single-bit checks and dealt with the
extra conditions in override_options.
Tested by building c4x-coff with the previously-posted BITS_PER_UNIT != 8
patches and with LIB2ADDEH set to the empty string[*]. I checked each
option by hand and it seemed to have the desired effect. OK to install?
Richard
* config/c4x/c4x-protos.h (c4x_rpts_cycles, c4x_cpu_version): Delete.
* config/c4x/c4x.h (SMALL_MEMORY_FLAG, MPYI_FLAG, FAST_FIX_FLAG)
(RPTS_FLAG, C3X_FLAG, TI_FLAG, PARANOID_FLAG, MEMPARM_FLAG, DEVEL_FLAG)
(RPTB_FLAG, BK_FLAG, DB_FLAG, DEBUG_FLAG, HOIST_FLAG)
(LOOP_UNSIGNED_FLAG, FORCE_FLAG, PRESERVE_FLOAT_FLAG)
(PARALLEL_INSN_FLAG, PARALLEL_MPY_FLAG, ALIASES_FLAG, C30_FLAG)
(C31_FLAG, C32_FLAG, C33_FLAG, C40_FLAG, C44_FLAG, TARGET_SWITCHES)
(TARGET_DEFAULT, TARGET_SMALL, TARGET_MPYI, TARGET_FAST_FIX)
(TARGET_RPTS, TARGET_TI, TARGET_PARANOID, TARGET_MEMPARM, TARGET_DEVEL)
(TARGET_RPTB, TARGET_BK, TARGET_DB, TARGET_DEBUG, TARGET_HOIST)
(TARGET_LOOP_UNSIGNED, TARGET_FORCE, TARGET_PRESERVE_FLOAT)
(TARGET_PARALLEL, TARGET_PARALLEL_MPY, TARGET_ALIASES)
(c4x_rpts_cycles_string, c4x_cpu_version_string)
(TARGET_OPTIONS): Delete.
(c4x_rpts_cycles, c4x_cpu_version): Declare.
(TARGET_C3X, TARGET_C30, TARGET_C31, TARGET_C32, TARGET_C33)
(TARGET_C40, TARGET_C44): Redefine in terms of c4x_cpu_version.
* config/c4x/c4x.c (c4x_rpts_cycles_string): Delete.
(c4x_cpu_version_string): Delete.
(TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults.
(c4x_handle_option): New function. Map -m3x and -m4x options to the
equivalent -mcpu= option.
(c4x_override_options): Remove -mrpts= and -mcpu= handling from here.
Deal with the extra conditions in the old TARGET_MPYI, TARGET_RPTB,
TARGET_DB, TARGET_PARALLEL and TARGET_PARALLEL_MPY macros by setting
or clearing the appropriate MASK_* bit.
(c4x_file_start): Use c4x_cpu_version.
* config/c4x/c4x.opt: New file.
Index: config/c4x/c4x-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x-protos.h,v
retrieving revision 1.37
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.37 c4x-protos.h
*** config/c4x/c4x-protos.h 8 Jul 2004 20:34:24 -0000 1.37
--- config/c4x/c4x-protos.h 20 Mar 2005 08:42:46 -0000
*************** extern GTY(()) rtx c4x_compare_op1; /* O
*** 274,282 ****
extern enum reg_class c4x_regclass_map[FIRST_PSEUDO_REGISTER];
extern enum machine_mode c4x_caller_save_map[FIRST_PSEUDO_REGISTER];
- extern int c4x_rpts_cycles; /* Max cycles for RPTS. */
- extern int c4x_cpu_version; /* Cpu version C30/31/32/40/44. */
-
extern void c4x_pr_CODE_SECTION (struct cpp_reader *);
extern void c4x_pr_DATA_SECTION (struct cpp_reader *);
extern void c4x_pr_FUNC_IS_PURE (struct cpp_reader *);
--- 274,279 ----
Index: config/c4x/c4x.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.h,v
retrieving revision 1.151
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.151 c4x.h
*** config/c4x/c4x.h 30 Dec 2004 03:07:44 -0000 1.151
--- config/c4x/c4x.h 20 Mar 2005 08:42:46 -0000
*************** #define LINK_SPEC "\
*** 123,308 ****
#define ENDFILE_SPEC ""
- /* Target compilation option flags. */
-
- #define SMALL_MEMORY_FLAG 0x0000001 /* Small memory model. */
- #define MPYI_FLAG 0x0000002 /* Use 24-bit MPYI for C3x. */
- #define FAST_FIX_FLAG 0x0000004 /* Fast fixing of floats. */
- #define RPTS_FLAG 0x0000008 /* Allow use of RPTS. */
- #define C3X_FLAG 0x0000010 /* Emit C3x code. */
- #define TI_FLAG 0x0000020 /* Be compatible with TI assembler. */
- #define PARANOID_FLAG 0x0000040 /* Be paranoid about DP reg. in ISRs. */
- #define MEMPARM_FLAG 0x0000080 /* Pass arguments on stack. */
- #define DEVEL_FLAG 0x0000100 /* Enable features under development. */
- #define RPTB_FLAG 0x0000200 /* Enable repeat block. */
- #define BK_FLAG 0x0000400 /* Use BK as general register. */
- #define DB_FLAG 0x0000800 /* Use decrement and branch for C3x. */
- #define DEBUG_FLAG 0x0001000 /* Enable debugging of GCC. */
- #define HOIST_FLAG 0x0002000 /* Force constants into registers. */
- #define LOOP_UNSIGNED_FLAG 0x0004000 /* Allow unsigned loop counters. */
- #define FORCE_FLAG 0x0008000 /* Force op0 and op1 to be same. */
- #define PRESERVE_FLOAT_FLAG 0x0010000 /* Save all 40 bits for floats. */
- #define PARALLEL_INSN_FLAG 0x0020000 /* Allow parallel insns. */
- #define PARALLEL_MPY_FLAG 0x0040000 /* Allow MPY||ADD, MPY||SUB insns. */
- #define ALIASES_FLAG 0x0080000 /* Assume mem refs possibly aliased. */
-
- #define C30_FLAG 0x0100000 /* Emit C30 code. */
- #define C31_FLAG 0x0200000 /* Emit C31 code. */
- #define C32_FLAG 0x0400000 /* Emit C32 code. */
- #define C33_FLAG 0x0800000 /* Emit C33 code. */
- #define C40_FLAG 0x1000000 /* Emit C40 code. */
- #define C44_FLAG 0x2000000 /* Emit C44 code. */
-
- /* Run-time compilation parameters selecting different hardware subsets.
-
- Macro to define tables used to set the flags.
- This is a list in braces of triplets in braces,
- each pair being { "NAME", VALUE, "DESCRIPTION" }
- where VALUE is the bits to set or minus the bits to clear.
- An empty string NAME is used to identify the default VALUE. */
-
- #define TARGET_SWITCHES \
- { { "small", SMALL_MEMORY_FLAG, \
- N_("Small memory model") }, \
- { "big", -SMALL_MEMORY_FLAG, \
- N_("Big memory model") }, \
- { "mpyi", MPYI_FLAG, \
- N_("Use MPYI instruction for C3x") }, \
- { "no-mpyi", -MPYI_FLAG, \
- N_("Do not use MPYI instruction for C3x") }, \
- { "fast-fix", FAST_FIX_FLAG, \
- N_("Use fast but approximate float to integer conversion") }, \
- { "no-fast-fix", -FAST_FIX_FLAG, \
- N_("Use slow but accurate float to integer conversion") }, \
- { "rpts", RPTS_FLAG, \
- N_("Enable use of RTPS instruction") }, \
- { "no-rpts", -RPTS_FLAG, \
- N_("Disable use of RTPS instruction") }, \
- { "rptb", RPTB_FLAG, \
- N_("Enable use of RTPB instruction") }, \
- { "no-rptb", -RPTB_FLAG, \
- N_("Disable use of RTPB instruction") }, \
- { "30", C30_FLAG, \
- N_("Generate code for C30 CPU")}, \
- { "31", C31_FLAG, \
- N_("Generate code for C31 CPU")}, \
- { "32", C32_FLAG, \
- N_("Generate code for C32 CPU")}, \
- { "33", C33_FLAG, \
- N_("Generate code for C33 CPU")}, \
- { "40", C40_FLAG, \
- N_("Generate code for C40 CPU")}, \
- { "44", C44_FLAG, \
- N_("Generate code for C44 CPU")}, \
- { "ti", TI_FLAG, \
- N_("Emit code compatible with TI tools")}, \
- { "no-ti", -TI_FLAG, \
- N_("Emit code to use GAS extensions")}, \
- { "paranoid", PARANOID_FLAG, \
- N_("Save DP across ISR in small memory model") }, \
- { "no-paranoid", -PARANOID_FLAG, \
- N_("Don't save DP across ISR in small memory model") }, \
- { "isr-dp-reload", PARANOID_FLAG, \
- N_("Save DP across ISR in small memory model") }, \
- { "no-isr-dp-reload", -PARANOID_FLAG, \
- N_("Don't save DP across ISR in small memory model") }, \
- { "memparm", MEMPARM_FLAG, \
- N_("Pass arguments on the stack") }, \
- { "regparm", -MEMPARM_FLAG, \
- N_("Pass arguments in registers") }, \
- { "devel", DEVEL_FLAG, \
- N_("Enable new features under development") }, \
- { "no-devel", -DEVEL_FLAG, \
- N_("Disable new features under development") }, \
- { "bk", BK_FLAG, \
- N_("Use the BK register as a general purpose register") }, \
- { "no-bk", -BK_FLAG, \
- N_("Do not allocate BK register") }, \
- { "db", DB_FLAG, \
- N_("Enable use of DB instruction") }, \
- { "no-db", -DB_FLAG, \
- N_("Disable use of DB instruction") }, \
- { "debug", DEBUG_FLAG, \
- N_("Enable debugging") }, \
- { "no-debug", -DEBUG_FLAG, \
- N_("Disable debugging") }, \
- { "hoist", HOIST_FLAG, \
- N_("Force constants into registers to improve hoisting") }, \
- { "no-hoist", -HOIST_FLAG, \
- N_("Don't force constants into registers") }, \
- { "force", FORCE_FLAG, \
- N_("Force RTL generation to emit valid 3 operand insns") }, \
- { "no-force", -FORCE_FLAG, \
- N_("Allow RTL generation to emit invalid 3 operand insns") }, \
- { "loop-unsigned", LOOP_UNSIGNED_FLAG, \
- N_("Allow unsigned iteration counts for RPTB/DB") }, \
- { "no-loop-unsigned", -LOOP_UNSIGNED_FLAG, \
- N_("Disallow unsigned iteration counts for RPTB/DB") }, \
- { "preserve-float", PRESERVE_FLOAT_FLAG, \
- N_("Preserve all 40 bits of FP reg across call") }, \
- { "no-preserve-float", -PRESERVE_FLOAT_FLAG, \
- N_("Only preserve 32 bits of FP reg across call") }, \
- { "parallel-insns", PARALLEL_INSN_FLAG, \
- N_("Enable parallel instructions") }, \
- { "no-parallel-insns", -PARALLEL_INSN_FLAG, \
- N_("Disable parallel instructions") }, \
- { "parallel-mpy", PARALLEL_MPY_FLAG, \
- N_("Enable MPY||ADD and MPY||SUB instructions") }, \
- { "no-parallel-mpy", -PARALLEL_MPY_FLAG, \
- N_("Disable MPY||ADD and MPY||SUB instructions") }, \
- { "aliases", ALIASES_FLAG, \
- N_("Assume that pointers may be aliased") }, \
- { "no-aliases", -ALIASES_FLAG, \
- N_("Assume that pointers not aliased") }, \
- { "", TARGET_DEFAULT, ""} }
-
- /* Default target switches. */
-
- /* Play safe, not the fastest code. */
- #define TARGET_DEFAULT ALIASES_FLAG | PARALLEL_INSN_FLAG \
- | PARALLEL_MPY_FLAG | RPTB_FLAG
-
/* Caveats:
Max iteration count for RPTB/RPTS is 2^31 + 1.
Max iteration count for DB is 2^31 + 1 for C40, but 2^23 + 1 for C30.
RPTS blocks interrupts. */
! extern int target_flags;
#define TARGET_INLINE (! optimize_size) /* Inline MPYI. */
#define TARGET_SMALL_REG_CLASS 0
! #define TARGET_SMALL (target_flags & SMALL_MEMORY_FLAG)
! #define TARGET_MPYI (!TARGET_C3X || (target_flags & MPYI_FLAG))
! #define TARGET_FAST_FIX (target_flags & FAST_FIX_FLAG)
! #define TARGET_RPTS (target_flags & RPTS_FLAG)
! #define TARGET_TI (target_flags & TI_FLAG)
! #define TARGET_PARANOID (target_flags & PARANOID_FLAG)
! #define TARGET_MEMPARM (target_flags & MEMPARM_FLAG)
! #define TARGET_DEVEL (target_flags & DEVEL_FLAG)
! #define TARGET_RPTB (target_flags & RPTB_FLAG \
! && optimize >= 2)
! #define TARGET_BK (target_flags & BK_FLAG)
! #define TARGET_DB (! TARGET_C3X || (target_flags & DB_FLAG))
! #define TARGET_DEBUG (target_flags & DEBUG_FLAG)
! #define TARGET_HOIST (target_flags & HOIST_FLAG)
! #define TARGET_LOOP_UNSIGNED (target_flags & LOOP_UNSIGNED_FLAG)
! #define TARGET_FORCE (target_flags & FORCE_FLAG)
! #define TARGET_PRESERVE_FLOAT (target_flags & PRESERVE_FLOAT_FLAG)
! #define TARGET_PARALLEL ((target_flags & PARALLEL_INSN_FLAG) \
! && optimize >= 2)
! #define TARGET_PARALLEL_MPY (TARGET_PARALLEL \
! && (target_flags & PARALLEL_MPY_FLAG))
! #define TARGET_ALIASES (target_flags & ALIASES_FLAG)
!
! #define TARGET_C3X (target_flags & C3X_FLAG)
! #define TARGET_C30 (target_flags & C30_FLAG)
! #define TARGET_C31 (target_flags & C31_FLAG)
! #define TARGET_C32 (target_flags & C32_FLAG)
! #define TARGET_C33 (target_flags & C33_FLAG)
! #define TARGET_C40 (target_flags & C40_FLAG)
! #define TARGET_C44 (target_flags & C44_FLAG)
/* Nonzero to use load_immed_addr pattern rather than forcing memory
addresses into memory. */
--- 123,149 ----
#define ENDFILE_SPEC ""
/* Caveats:
Max iteration count for RPTB/RPTS is 2^31 + 1.
Max iteration count for DB is 2^31 + 1 for C40, but 2^23 + 1 for C30.
RPTS blocks interrupts. */
! extern int c4x_rpts_cycles; /* Max cycles for RPTS. */
! extern int c4x_cpu_version; /* Cpu version C30/31/32/33/40/44. */
#define TARGET_INLINE (! optimize_size) /* Inline MPYI. */
#define TARGET_SMALL_REG_CLASS 0
! #define TARGET_C3X (c4x_cpu_version >= 30 \
! && c4x_cpu_version <= 39)
!
! #define TARGET_C30 (c4x_cpu_version == 30)
! #define TARGET_C31 (c4x_cpu_version == 31)
! #define TARGET_C32 (c4x_cpu_version == 32)
! #define TARGET_C33 (c4x_cpu_version == 33)
! #define TARGET_C40 (c4x_cpu_version == 40)
! #define TARGET_C44 (c4x_cpu_version == 44)
/* Nonzero to use load_immed_addr pattern rather than forcing memory
addresses into memory. */
*************** #define TARGET_LOAD_DIRECT_MEMS 0
*** 321,336 ****
#define TARGET_RPTS_CYCLES(CYCLES) (TARGET_RPTS || (CYCLES) < c4x_rpts_cycles)
- /* -mcpu=XX with XX = target DSP version number. */
-
- extern const char *c4x_rpts_cycles_string, *c4x_cpu_version_string;
-
- #define TARGET_OPTIONS \
- { {"rpts=", &c4x_rpts_cycles_string, \
- N_("Specify maximum number of iterations for RPTS"), 0}, \
- {"cpu=", &c4x_cpu_version_string, \
- N_("Select CPU to generate code for"), 0} }
-
/* Sometimes certain combinations of command options do not make sense
on a particular target machine. You can define a macro
`OVERRIDE_OPTIONS' to take account of this. This macro, if
--- 162,167 ----
Index: config/c4x/c4x.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.c,v
retrieving revision 1.165
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.165 c4x.c
*** config/c4x/c4x.c 9 Nov 2004 10:12:57 -0000 1.165
--- config/c4x/c4x.c 20 Mar 2005 08:42:47 -0000
*************** enum machine_mode c4x_caller_save_map[FI
*** 152,160 ****
rtx c4x_compare_op0;
rtx c4x_compare_op1;
- const char *c4x_rpts_cycles_string;
int c4x_rpts_cycles = 0; /* Max. cycles for RPTS. */
- const char *c4x_cpu_version_string;
int c4x_cpu_version = 40; /* CPU version C30/31/32/33/40/44. */
/* Pragma definitions. */
--- 152,158 ----
*************** tree interrupt_tree = NULL_TREE;
*** 167,172 ****
--- 165,171 ----
tree naked_tree = NULL_TREE;
/* Forward declarations */
+ static bool c4x_handle_option (size_t, const char *, int);
static int c4x_isr_reg_used_p (unsigned int);
static int c4x_leaf_function_p (void);
static int c4x_naked_function_p (void);
*************** #define TARGET_ASM_FILE_END c4x_file_end
*** 221,226 ****
--- 220,232 ----
#undef TARGET_ASM_EXTERNAL_LIBCALL
#define TARGET_ASM_EXTERNAL_LIBCALL c4x_external_libcall
+ /* Play safe, not the fastest code. */
+ #undef TARGET_DEFAULT_TARGET_FLAGS
+ #define TARGET_DEFAULT_TARGET_FLAGS (MASK_ALIASES | MASK_PARALLEL \
+ | MASK_PARALLEL_MPY | MASK_RPTB)
+ #undef TARGET_HANDLE_OPTION
+ #define TARGET_HANDLE_OPTION c4x_handle_option
+
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE c4x_attribute_table
*************** #define TARGET_GIMPLIFY_VA_ARG_EXPR c4x_
*** 258,324 ****
struct gcc_target targetm = TARGET_INITIALIZER;
! /* Override command line options.
! Called once after all options have been parsed.
! Mostly we process the processor
! type and sometimes adjust other TARGET_ options. */
! void
! c4x_override_options (void)
{
! if (c4x_rpts_cycles_string)
! c4x_rpts_cycles = atoi (c4x_rpts_cycles_string);
! else
! c4x_rpts_cycles = 0;
! if (TARGET_C30)
! c4x_cpu_version = 30;
! else if (TARGET_C31)
! c4x_cpu_version = 31;
! else if (TARGET_C32)
! c4x_cpu_version = 32;
! else if (TARGET_C33)
! c4x_cpu_version = 33;
! else if (TARGET_C40)
! c4x_cpu_version = 40;
! else if (TARGET_C44)
! c4x_cpu_version = 44;
! else
! c4x_cpu_version = 40;
- /* -mcpu=xx overrides -m40 etc. */
- if (c4x_cpu_version_string)
- {
- const char *p = c4x_cpu_version_string;
-
- /* Also allow -mcpu=c30 etc. */
- if (*p == 'c' || *p == 'C')
- p++;
- c4x_cpu_version = atoi (p);
- }
-
- target_flags &= ~(C30_FLAG | C31_FLAG | C32_FLAG | C33_FLAG |
- C40_FLAG | C44_FLAG);
-
- switch (c4x_cpu_version)
- {
- case 30: target_flags |= C30_FLAG; break;
- case 31: target_flags |= C31_FLAG; break;
- case 32: target_flags |= C32_FLAG; break;
- case 33: target_flags |= C33_FLAG; break;
- case 40: target_flags |= C40_FLAG; break;
- case 44: target_flags |= C44_FLAG; break;
default:
! warning ("unknown CPU version %d, using 40.\n", c4x_cpu_version);
! c4x_cpu_version = 40;
! target_flags |= C40_FLAG;
}
! if (TARGET_C30 || TARGET_C31 || TARGET_C32 || TARGET_C33)
! target_flags |= C3X_FLAG;
! else
! target_flags &= ~C3X_FLAG;
/* Convert foo / 8.0 into foo * 0.125, etc. */
set_fast_math_flags (1);
--- 264,312 ----
struct gcc_target targetm = TARGET_INITIALIZER;
! /* Implement TARGET_HANDLE_OPTION. */
! static bool
! c4x_handle_option (size_t code, const char *arg, int value)
{
! switch (code)
! {
! case OPT_m30: c4x_cpu_version = 30; return true;
! case OPT_m31: c4x_cpu_version = 31; return true;
! case OPT_m32: c4x_cpu_version = 32; return true;
! case OPT_m33: c4x_cpu_version = 33; return true;
! case OPT_m40: c4x_cpu_version = 40; return true;
! case OPT_m44: c4x_cpu_version = 44; return true;
!
! case OPT_mcpu_:
! if (arg[0] == 'c' || arg[0] == 'C')
! arg++;
! value = atoi (arg);
! switch (value)
! {
! case 30: case 31: case 32: case 33: case 40: case 44:
! c4x_cpu_version = value;
! return true;
! }
! return false;
! case OPT_mrpts_:
! c4x_rpts_cycles = value;
! return true;
default:
! return true;
}
+ }
! /* Override command line options.
! Called once after all options have been parsed.
! Mostly we process the processor
! type and sometimes adjust other TARGET_ options. */
+ void
+ c4x_override_options (void)
+ {
/* Convert foo / 8.0 into foo * 0.125, etc. */
set_fast_math_flags (1);
*************** c4x_override_options (void)
*** 326,331 ****
--- 314,328 ----
This provides compatibility with the old -mno-aliases option. */
if (! TARGET_ALIASES && ! flag_argument_noalias)
flag_argument_noalias = 1;
+
+ if (!TARGET_C3X)
+ target_flags |= MASK_MPYI | MASK_DB;
+
+ if (optimize < 2)
+ target_flags &= ~(MASK_RPTB | MASK_PARALLEL);
+
+ if (!TARGET_PARALLEL)
+ target_flags &= ~MASK_PARALLEL_MPY;
}
*************** c4x_external_ref (const char *name)
*** 4409,4424 ****
static void
c4x_file_start (void)
{
- int dspversion = 0;
- if (TARGET_C30) dspversion = 30;
- if (TARGET_C31) dspversion = 31;
- if (TARGET_C32) dspversion = 32;
- if (TARGET_C33) dspversion = 33;
- if (TARGET_C40) dspversion = 40;
- if (TARGET_C44) dspversion = 44;
-
default_file_start ();
! fprintf (asm_out_file, "\t.version\t%d\n", dspversion);
fputs ("\n\t.data\ndata_sec:\n", asm_out_file);
}
--- 4406,4413 ----
static void
c4x_file_start (void)
{
default_file_start ();
! fprintf (asm_out_file, "\t.version\t%d\n", c4x_cpu_version);
fputs ("\n\t.data\ndata_sec:\n", asm_out_file);
}
diff -c /dev/null config/c4x/c4x.opt
*** /dev/null 2005-01-29 16:17:39.000000000 +0000
--- config/c4x/c4x.opt 2005-03-18 12:58:08.000000000 +0000
***************
*** 0 ****
--- 1,140 ----
+ ; Options for the TMS320C[34]x port of the compiler.
+
+ ; Copyright (C) 2005 Free Software Foundation, Inc.
+ ;
+ ; This file is part of GCC.
+ ;
+ ; GCC is free software; you can redistribute it and/or modify it under
+ ; the terms of the GNU General Public License as published by the Free
+ ; Software Foundation; either version 2, or (at your option) any later
+ ; version.
+ ;
+ ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ ; for more details.
+ ;
+ ; You should have received a copy of the GNU General Public License
+ ; along with GCC; see the file COPYING. If not, write to the Free
+ ; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ ; 02111-1307, USA.
+
+ m30
+ Target RejectNegative
+ Generate code for C30 CPU
+
+ m31
+ Target RejectNegative
+ Generate code for C31 CPU
+
+ m32
+ Target RejectNegative
+ Generate code for C32 CPU
+
+ m33
+ Target RejectNegative
+ Generate code for C33 CPU
+
+ m40
+ Target RejectNegative
+ Generate code for C40 CPU
+
+ m44
+ Target RejectNegative
+ Generate code for C44 CPU
+
+ maliases
+ Target Report Mask(ALIASES)
+ Assume that pointers may be aliased
+
+ mbig
+ Target RejectNegative Report InverseMask(SMALL)
+ Big memory model
+
+ mbk
+ Target Report Mask(BK)
+ Use the BK register as a general purpose register
+
+ mcpu=
+ Target RejectNegative Joined
+ -mcpu=CPU Generate code for CPU
+
+ mdb
+ Target Report Mask(DB)
+ Enable use of DB instruction
+
+ mdebug
+ Target Report Mask(DEBUG)
+ Enable debugging
+
+ mdevel
+ Target Report Mask(DEVEL)
+ Enable new features under development
+
+ mfast-fix
+ Target Report Mask(FAST_FIX)
+ Use fast but approximate float to integer conversion
+
+ mforce
+ Target Report Mask(FORCE)
+ Force RTL generation to emit valid 3 operand insns
+
+ mhoist
+ Target Report Mask(HOIST)
+ Force constants into registers to improve hoisting
+
+ misr-dp-reload
+ Target Mask(PARANOID) MaskExists
+ Save DP across ISR in small memory model
+
+ mloop-unsigned
+ Target Report Mask(LOOP_UNSIGNED)
+ Allow unsigned iteration counts for RPTB/DB
+
+ mmemparm
+ Target RejectNegative Report Mask(MEMPARM)
+ Pass arguments on the stack
+
+ mmpyi
+ Target Report Mask(MPYI)
+ Use MPYI instruction for C3x
+
+ mparallel-insns
+ Target Report Mask(PARALLEL)
+ Enable parallel instructions
+
+ mparallel-mpy
+ Target Report Mask(PARALLEL_MPY)
+ Enable MPY||ADD and MPY||SUB instructions
+
+ mparanoid
+ Target Report Mask(PARANOID)
+ Save DP across ISR in small memory model
+
+ mpreserve-float
+ Target Report Mask(PRESERVE_FLOAT)
+ Preserve all 40 bits of FP reg across call
+
+ mregparm
+ Target RejectNegative Report InverseMask(MEMPARM)
+ Pass arguments in registers
+
+ mrptb
+ Target Report Mask(RPTB)
+ Enable use of RTPB instruction
+
+ mrpts
+ Target Report Mask(RPTS)
+ Enable use of RTPS instruction
+
+ mrpts=
+ Target RejectNegative Joined UInteger
+ -mrpts=N Set the maximum number of iterations for RPTS to N
+
+ msmall
+ Target RejectNegative Report Mask(SMALL)
+ Small memory model
+
+ mti
+ Target Report Mask(TI)
+ Emit code compatible with TI tools