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[patch] config/*: Follow spelling conventions.
- From: Kazu Hirata <kazu at cs dot umass dot edu>
- To: gcc-patches at gcc dot gnu dot org
- Date: Tue, 14 Sep 2004 06:47:55 -0400 (EDT)
- Subject: [patch] config/*: Follow spelling conventions.
Hi,
Committed as obvious.
Kazu Hirata
2004-09-14 Kazu Hirata <kazu@cs.umass.edu>
* config/darwin-c.c, config/alpha/alpha.c, config/i386/i386.c,
config/i386/predicates.md, config/sparc/sparc.c: Follow
spelling conventions.
Index: config/darwin-c.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/darwin-c.c,v
retrieving revision 1.12
diff -u -r1.12 darwin-c.c
--- config/darwin-c.c 13 Aug 2004 15:33:51 -0000 1.12
+++ config/darwin-c.c 14 Sep 2004 10:39:05 -0000
@@ -449,7 +449,7 @@
fails to find a header. We search each file in the include stack,
using FUNC, starting from the most deeply nested include and
finishing with the main input file. We stop searching when FUNC
- returns non-zero. */
+ returns nonzero. */
static const char*
find_subframework_header (cpp_reader *pfile, const char *header, cpp_dir **dirp)
Index: config/alpha/alpha.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.c,v
retrieving revision 1.392
diff -u -r1.392 alpha.c
--- config/alpha/alpha.c 26 Aug 2004 09:08:03 -0000 1.392
+++ config/alpha/alpha.c 14 Sep 2004 10:39:09 -0000
@@ -6179,7 +6179,7 @@
#define FRP(exp) (start_sequence (), exp, set_frame_related_p ())
/* Generates a store with the proper unwind info attached. VALUE is
- stored at BASE_REG+BASE_OFS. If FRAME_BIAS is non-zero, then BASE_REG
+ stored at BASE_REG+BASE_OFS. If FRAME_BIAS is nonzero, then BASE_REG
contains SP+FRAME_BIAS, and that is the unwind info that should be
generated. If FRAME_REG != VALUE, then VALUE is being stored on
behalf of FRAME_REG, and FRAME_REG should be present in the unwind. */
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.727
diff -u -r1.727 i386.c
--- config/i386/i386.c 14 Sep 2004 05:21:48 -0000 1.727
+++ config/i386/i386.c 14 Sep 2004 10:39:15 -0000
@@ -9960,7 +9960,7 @@
}
}
- /* If optimizing for size, attempt to locally unCSE non-zero constants. */
+ /* If optimizing for size, attempt to locally unCSE nonzero constants. */
if (optimize_size)
{
if (GET_CODE (operands[5]) == CONST_INT
Index: config/i386/predicates.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/predicates.md,v
retrieving revision 1.4
diff -u -r1.4 predicates.md
--- config/i386/predicates.md 12 Sep 2004 18:00:49 -0000 1.4
+++ config/i386/predicates.md 14 Sep 2004 10:39:15 -0000
@@ -571,7 +571,7 @@
(match_operand 0 "reg_or_pm1_operand")))
;; Return true if OP is a vector load from the constant pool with just
-;; the first element non-zero.
+;; the first element nonzero.
(define_predicate "zero_extended_scalar_load_operand"
(match_code "mem")
{
Index: config/sparc/sparc.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sparc/sparc.c,v
retrieving revision 1.333
diff -u -r1.333 sparc.c
--- config/sparc/sparc.c 14 Sep 2004 04:05:40 -0000 1.333
+++ config/sparc/sparc.c 14 Sep 2004 10:39:19 -0000
@@ -1644,7 +1644,7 @@
/* Load OP1, a symbolic 64-bit constant, into OP0, a DImode register.
- If TEMP is non-zero, we are forbidden to use any other scratch
+ If TEMP is nonzero, we are forbidden to use any other scratch
registers. Otherwise, we are allowed to generate them as needed.
Note that TEMP may have TImode if the code model is TARGET_CM_MEDANY