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[PATCH ARM] Fix fallout from deletion of preserve_subexpressions_p
- From: Richard Earnshaw <rearnsha at buzzard dot freeserve dot co dot uk>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Richard dot Earnshaw at buzzard dot freeserve dot co dot uk
- Date: Wed, 18 Aug 2004 00:41:37 +0100
- Subject: [PATCH ARM] Fix fallout from deletion of preserve_subexpressions_p
- Reply-to: Richard dot Earnshaw at buzzard dot freeserve dot co dot uk
As subject line...
2004-08-18 Richard Earnshaw <rearnsha@arm.com>
* arm.md (addsi3, subsi3, andsi3, iorsi3, movsi, movhi): Rework to
avoid use of preserve_subexpressions_p.
Index: arm.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.177
diff -p -p -r1.177 arm.md
*** arm.md 17 Aug 2004 10:01:49 -0000 1.177
--- arm.md 17 Aug 2004 23:32:07 -0000
***************
*** 449,455 ****
{
arm_split_constant (PLUS, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0], operands[1],
! (no_new_pseudos ? 0 : preserve_subexpressions_p ()));
DONE;
}
"
--- 449,455 ----
{
arm_split_constant (PLUS, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0], operands[1],
! optimize && !no_new_pseudos);
DONE;
}
"
***************
*** 935,943 ****
{
arm_split_constant (MINUS, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0],
! operands[2],
! (no_new_pseudos ? 0
! : preserve_subexpressions_p ()));
DONE;
}
else /* TARGET_THUMB */
--- 935,941 ----
{
arm_split_constant (MINUS, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0],
! operands[2], optimize && !no_new_pseudos);
DONE;
}
else /* TARGET_THUMB */
***************
*** 1512,1520 ****
{
arm_split_constant (AND, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0],
! operands[1],
! (no_new_pseudos
! ? 0 : preserve_subexpressions_p ()));
DONE;
}
}
--- 1510,1517 ----
{
arm_split_constant (AND, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0],
! operands[1], optimize && !no_new_pseudos);
!
DONE;
}
}
***************
*** 2167,2174 ****
{
arm_split_constant (IOR, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0], operands[1],
! (no_new_pseudos
! ? 0 : preserve_subexpressions_p ()));
DONE;
}
else /* TARGET_THUMB */
--- 2164,2170 ----
{
arm_split_constant (IOR, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0], operands[1],
! optimize && !no_new_pseudos);
DONE;
}
else /* TARGET_THUMB */
***************
*** 4256,4263 ****
{
arm_split_constant (SET, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0], NULL_RTX,
! (no_new_pseudos ? 0
! : preserve_subexpressions_p ()));
DONE;
}
}
--- 4252,4258 ----
{
arm_split_constant (SET, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0], NULL_RTX,
! optimize && !no_new_pseudos);
DONE;
}
}
***************
*** 4653,4659 ****
emit_insn (gen_movsi (reg, GEN_INT (val)));
operands[1] = gen_lowpart (HImode, reg);
}
! else if (arm_arch4 && !no_new_pseudos && optimize > 0
&& GET_CODE (operands[1]) == MEM)
{
rtx reg = gen_reg_rtx (SImode);
--- 4648,4654 ----
emit_insn (gen_movsi (reg, GEN_INT (val)));
operands[1] = gen_lowpart (HImode, reg);
}
! else if (arm_arch4 && optimize && !no_new_pseudos
&& GET_CODE (operands[1]) == MEM)
{
rtx reg = gen_reg_rtx (SImode);