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Compiling GCC with a C++ compiler (3/n)
- From: Gabriel Dos Reis <gdr at integrable-solutions dot net>
- To: gcc-patches at gcc dot gnu dot org
- Date: 02 Aug 2004 12:42:54 +0200
- Subject: Compiling GCC with a C++ compiler (3/n)
- Organization: Integrable Solutions
This patch makes rtl.h a bit more C++ friendly.
The definition of rtunion_def looked like
union rtunion_def
{
/* ... */
rtx rtx;
/* ... */
};
which hurts C++ scope and declarations rules, as the declaration of
the data member rtunion_def::rtx is changing the meaning of the name
"rtx" at the class-scope of rtunion_def, before and after its
completion. "rtx" has a forward declaration in coretypes.h.
This patch systematically uses the prefix "rt_" at the class-scope
of rtunion_def. That convention was picked after the existing
data member declarations
addr_diff_vec_flags rt_addr_diff_vec_flags;
struct cselib_val_struct *rt_cselib;
Since the structure of rtunion_def was hardcoded/hardduplicated in
gengtype.c, I made the corresponding change there too. rtlanal.c also
has a direct, unabstracted reference to rtunion_def::rtx. Hence the
change there too.
Bootstrapped and regtested on an i686-pc-linux-gnu.
-- Gaby
Index: ChangeLog
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog,v
retrieving revision 2.4760
diff -p -r2.4760 ChangeLog
*** ChangeLog 2 Aug 2004 06:13:07 -0000 2.4760
--- ChangeLog 2 Aug 2004 10:26:38 -0000
***************
*** 1,3 ****
--- 1,15 ----
+ 2004-08-02 Gabriel Dos Reis <gdr@integrable-solutions.net>
+
+ * rtl.h (union rtunion_def): Have all members start with the
+ prefix "rt_".
+ (XINT, XSTR, XEXP, XVEC, XMODE, XBITMAP, XTREE, XBBDEF, XTMPL,
+ X0INT, X0UINT, X0STR, X0EXP, X0VEC, X0MODE, X0BITMAP, X0TREE,
+ X0MEMATTR, X0BBDEF, X0REGATTR, XCINT, XCUINT, XCSTR, XCEXP,
+ XCVEC, XCMODE, XCBITMAP, XCTREE, XCBBDEF, XC2EXP): Adjust members
+ access.
+ * gengtype.c (adjust_field_rtx_def): Likewise.
+ * rtlanal.c (loc_mentioned_in_p): Likewise.
+
2004-08-02 Richard Sandiford <rsandifo@redhat.com>
* config.gcc (mips*-*-elf*, mips*-*-rtems*): Add elfos.h to tm_file.
Index: gengtype.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/gengtype.c,v
retrieving revision 1.59
diff -p -r1.59 gengtype.c
*** gengtype.c 26 Jul 2004 01:33:36 -0000 1.59
--- gengtype.c 2 Aug 2004 10:26:39 -0000
*************** adjust_field_rtx_def (type_p t, options_
*** 449,472 ****
number notes. */
case NOTE_INSN_MAX:
note_flds->opt->name = "default";
! note_flds->name = "rtstr";
note_flds->type = &string_type;
break;
case NOTE_INSN_BLOCK_BEG:
case NOTE_INSN_BLOCK_END:
! note_flds->name = "rttree";
note_flds->type = tree_tp;
break;
case NOTE_INSN_EXPECTED_VALUE:
case NOTE_INSN_VAR_LOCATION:
! note_flds->name = "rtx";
note_flds->type = rtx_tp;
break;
default:
! note_flds->name = "rtint";
note_flds->type = scalar_tp;
break;
}
--- 449,472 ----
number notes. */
case NOTE_INSN_MAX:
note_flds->opt->name = "default";
! note_flds->name = "rt_str";
note_flds->type = &string_type;
break;
case NOTE_INSN_BLOCK_BEG:
case NOTE_INSN_BLOCK_END:
! note_flds->name = "rt_tree";
note_flds->type = tree_tp;
break;
case NOTE_INSN_EXPECTED_VALUE:
case NOTE_INSN_VAR_LOCATION:
! note_flds->name = "rt_rtx";
note_flds->type = rtx_tp;
break;
default:
! note_flds->name = "rt_int";
note_flds->type = scalar_tp;
break;
}
*************** adjust_field_rtx_def (type_p t, options_
*** 497,544 ****
case 'n':
case 'w':
t = scalar_tp;
! subname = "rtint";
break;
case '0':
if (i == MEM && aindex == 1)
! t = mem_attrs_tp, subname = "rtmem";
else if (i == JUMP_INSN && aindex == 9)
! t = rtx_tp, subname = "rtx";
else if (i == CODE_LABEL && aindex == 4)
! t = scalar_tp, subname = "rtint";
else if (i == CODE_LABEL && aindex == 5)
! t = rtx_tp, subname = "rtx";
else if (i == LABEL_REF
&& (aindex == 1 || aindex == 2))
! t = rtx_tp, subname = "rtx";
else if (i == NOTE && aindex == 4)
t = note_union_tp, subname = "";
else if (i == NOTE && aindex >= 7)
! t = scalar_tp, subname = "rtint";
else if (i == ADDR_DIFF_VEC && aindex == 4)
! t = scalar_tp, subname = "rtint";
else if (i == VALUE && aindex == 0)
! t = scalar_tp, subname = "rtint";
else if (i == REG && aindex == 1)
! t = scalar_tp, subname = "rtint";
else if (i == REG && aindex == 2)
! t = reg_attrs_tp, subname = "rtreg";
else if (i == SCRATCH && aindex == 0)
! t = scalar_tp, subname = "rtint";
else if (i == SYMBOL_REF && aindex == 1)
! t = scalar_tp, subname = "rtint";
else if (i == SYMBOL_REF && aindex == 2)
! t = tree_tp, subname = "rttree";
else if (i == BARRIER && aindex >= 3)
! t = scalar_tp, subname = "rtint";
else
{
error_at_line (&lexer_line,
"rtx type `%s' has `0' in position %lu, can't handle",
rtx_name[i], (unsigned long) aindex);
t = &string_type;
! subname = "rtint";
}
break;
--- 497,544 ----
case 'n':
case 'w':
t = scalar_tp;
! subname = "rt_int";
break;
case '0':
if (i == MEM && aindex == 1)
! t = mem_attrs_tp, subname = "rt_mem";
else if (i == JUMP_INSN && aindex == 9)
! t = rtx_tp, subname = "rt_rtx";
else if (i == CODE_LABEL && aindex == 4)
! t = scalar_tp, subname = "rt_int";
else if (i == CODE_LABEL && aindex == 5)
! t = rtx_tp, subname = "rt_rtx";
else if (i == LABEL_REF
&& (aindex == 1 || aindex == 2))
! t = rtx_tp, subname = "rt_rtx";
else if (i == NOTE && aindex == 4)
t = note_union_tp, subname = "";
else if (i == NOTE && aindex >= 7)
! t = scalar_tp, subname = "rt_int";
else if (i == ADDR_DIFF_VEC && aindex == 4)
! t = scalar_tp, subname = "rt_int";
else if (i == VALUE && aindex == 0)
! t = scalar_tp, subname = "rt_int";
else if (i == REG && aindex == 1)
! t = scalar_tp, subname = "rt_int";
else if (i == REG && aindex == 2)
! t = reg_attrs_tp, subname = "rt_reg";
else if (i == SCRATCH && aindex == 0)
! t = scalar_tp, subname = "rt_int";
else if (i == SYMBOL_REF && aindex == 1)
! t = scalar_tp, subname = "rt_int";
else if (i == SYMBOL_REF && aindex == 2)
! t = tree_tp, subname = "rt_tree";
else if (i == BARRIER && aindex >= 3)
! t = scalar_tp, subname = "rt_int";
else
{
error_at_line (&lexer_line,
"rtx type `%s' has `0' in position %lu, can't handle",
rtx_name[i], (unsigned long) aindex);
t = &string_type;
! subname = "rt_int";
}
break;
*************** adjust_field_rtx_def (type_p t, options_
*** 546,579 ****
case 'S':
case 'T':
t = &string_type;
! subname = "rtstr";
break;
case 'e':
case 'u':
t = rtx_tp;
! subname = "rtx";
break;
case 'E':
case 'V':
t = rtvec_tp;
! subname = "rtvec";
break;
case 't':
t = tree_tp;
! subname = "rttree";
break;
case 'b':
t = bitmap_tp;
! subname = "rtbit";
break;
case 'B':
t = basic_block_tp;
! subname = "bb";
break;
default:
--- 546,579 ----
case 'S':
case 'T':
t = &string_type;
! subname = "rt_str";
break;
case 'e':
case 'u':
t = rtx_tp;
! subname = "rt_rtx";
break;
case 'E':
case 'V':
t = rtvec_tp;
! subname = "rt_rtvec";
break;
case 't':
t = tree_tp;
! subname = "rt_tree";
break;
case 'b':
t = bitmap_tp;
! subname = "rt_bit";
break;
case 'B':
t = basic_block_tp;
! subname = "rt_bb";
break;
default:
*************** adjust_field_rtx_def (type_p t, options_
*** 582,588 ****
rtx_name[i], rtx_format[i][aindex],
(unsigned long)aindex);
t = &string_type;
! subname = "rtint";
break;
}
--- 582,588 ----
rtx_name[i], rtx_format[i][aindex],
(unsigned long)aindex);
t = &string_type;
! subname = "rt_int";
break;
}
Index: rtl.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/rtl.h,v
retrieving revision 1.496
diff -p -r1.496 rtl.h
*** rtl.h 29 Jul 2004 07:37:12 -0000 1.496
--- rtl.h 2 Aug 2004 10:26:40 -0000
*************** typedef struct reg_attrs GTY(())
*** 161,179 ****
union rtunion_def
{
! int rtint;
! unsigned int rtuint;
! const char *rtstr;
! rtx rtx;
! rtvec rtvec;
! enum machine_mode rttype;
addr_diff_vec_flags rt_addr_diff_vec_flags;
struct cselib_val_struct *rt_cselib;
! struct bitmap_head_def *rtbit;
! tree rttree;
! struct basic_block_def *bb;
! mem_attrs *rtmem;
! reg_attrs *rtreg;
};
typedef union rtunion_def rtunion;
--- 161,179 ----
union rtunion_def
{
! int rt_int;
! unsigned int rt_uint;
! const char *rt_str;
! rtx rt_rtx;
! rtvec rt_rtvec;
! enum machine_mode rt_type;
addr_diff_vec_flags rt_addr_diff_vec_flags;
struct cselib_val_struct *rt_cselib;
! struct bitmap_head_def *rt_bit;
! tree rt_tree;
! struct basic_block_def *rt_bb;
! mem_attrs *rt_mem;
! reg_attrs *rt_reg;
};
typedef union rtunion_def rtunion;
*************** do { \
*** 602,616 ****
_rtx->return_val = 0; \
} while (0)
! #define XINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rtint)
! #define XSTR(RTX, N) (RTL_CHECK2 (RTX, N, 's', 'S').rtstr)
! #define XEXP(RTX, N) (RTL_CHECK2 (RTX, N, 'e', 'u').rtx)
! #define XVEC(RTX, N) (RTL_CHECK2 (RTX, N, 'E', 'V').rtvec)
! #define XMODE(RTX, N) (RTL_CHECK1 (RTX, N, 'M').rttype)
! #define XBITMAP(RTX, N) (RTL_CHECK1 (RTX, N, 'b').rtbit)
! #define XTREE(RTX, N) (RTL_CHECK1 (RTX, N, 't').rttree)
! #define XBBDEF(RTX, N) (RTL_CHECK1 (RTX, N, 'B').bb)
! #define XTMPL(RTX, N) (RTL_CHECK1 (RTX, N, 'T').rtstr)
#define XVECEXP(RTX, N, M) RTVEC_ELT (XVEC (RTX, N), M)
#define XVECLEN(RTX, N) GET_NUM_ELEM (XVEC (RTX, N))
--- 602,616 ----
_rtx->return_val = 0; \
} while (0)
! #define XINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_int)
! #define XSTR(RTX, N) (RTL_CHECK2 (RTX, N, 's', 'S').rt_str)
! #define XEXP(RTX, N) (RTL_CHECK2 (RTX, N, 'e', 'u').rt_rtx)
! #define XVEC(RTX, N) (RTL_CHECK2 (RTX, N, 'E', 'V').rt_rtvec)
! #define XMODE(RTX, N) (RTL_CHECK1 (RTX, N, 'M').rt_type)
! #define XBITMAP(RTX, N) (RTL_CHECK1 (RTX, N, 'b').rt_bit)
! #define XTREE(RTX, N) (RTL_CHECK1 (RTX, N, 't').rt_tree)
! #define XBBDEF(RTX, N) (RTL_CHECK1 (RTX, N, 'B').rt_bb)
! #define XTMPL(RTX, N) (RTL_CHECK1 (RTX, N, 'T').rt_str)
#define XVECEXP(RTX, N, M) RTVEC_ELT (XVEC (RTX, N), M)
#define XVECLEN(RTX, N) GET_NUM_ELEM (XVEC (RTX, N))
*************** do { \
*** 618,656 ****
/* These are like XINT, etc. except that they expect a '0' field instead
of the normal type code. */
! #define X0INT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtint)
! #define X0UINT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtuint)
! #define X0STR(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtstr)
! #define X0EXP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtx)
! #define X0VEC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtvec)
! #define X0MODE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rttype)
! #define X0BITMAP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtbit)
! #define X0TREE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rttree)
! #define X0BBDEF(RTX, N) (RTL_CHECK1 (RTX, N, '0').bb)
#define X0ADVFLAGS(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_addr_diff_vec_flags)
#define X0CSELIB(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_cselib)
! #define X0MEMATTR(RTX, N) (RTL_CHECKC1 (RTX, N, MEM).rtmem)
! #define X0REGATTR(RTX, N) (RTL_CHECKC1 (RTX, N, REG).rtreg)
/* Access a '0' field with any type. */
#define X0ANY(RTX, N) RTL_CHECK1 (RTX, N, '0')
! #define XCINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtint)
! #define XCUINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtuint)
! #define XCSTR(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtstr)
! #define XCEXP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtx)
! #define XCVEC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtvec)
! #define XCMODE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rttype)
! #define XCBITMAP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtbit)
! #define XCTREE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rttree)
! #define XCBBDEF(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).bb)
#define XCADVFLAGS(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_addr_diff_vec_flags)
#define XCCSELIB(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cselib)
#define XCVECEXP(RTX, N, M, C) RTVEC_ELT (XCVEC (RTX, N, C), M)
#define XCVECLEN(RTX, N, C) GET_NUM_ELEM (XCVEC (RTX, N, C))
! #define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rtx)
/* ACCESS MACROS for particular fields of insns. */
--- 618,656 ----
/* These are like XINT, etc. except that they expect a '0' field instead
of the normal type code. */
! #define X0INT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_int)
! #define X0UINT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_uint)
! #define X0STR(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_str)
! #define X0EXP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtx)
! #define X0VEC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtvec)
! #define X0MODE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_type)
! #define X0BITMAP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_bit)
! #define X0TREE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_tree)
! #define X0BBDEF(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_bb)
#define X0ADVFLAGS(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_addr_diff_vec_flags)
#define X0CSELIB(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_cselib)
! #define X0MEMATTR(RTX, N) (RTL_CHECKC1 (RTX, N, MEM).rt_mem)
! #define X0REGATTR(RTX, N) (RTL_CHECKC1 (RTX, N, REG).rt_reg)
/* Access a '0' field with any type. */
#define X0ANY(RTX, N) RTL_CHECK1 (RTX, N, '0')
! #define XCINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_int)
! #define XCUINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_uint)
! #define XCSTR(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_str)
! #define XCEXP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtx)
! #define XCVEC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtvec)
! #define XCMODE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_type)
! #define XCBITMAP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_bit)
! #define XCTREE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_tree)
! #define XCBBDEF(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_bb)
#define XCADVFLAGS(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_addr_diff_vec_flags)
#define XCCSELIB(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cselib)
#define XCVECEXP(RTX, N, M, C) RTVEC_ELT (XCVEC (RTX, N, C), M)
#define XCVECLEN(RTX, N, C) GET_NUM_ELEM (XCVEC (RTX, N, C))
! #define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx)
/* ACCESS MACROS for particular fields of insns. */
Index: rtlanal.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/rtlanal.c,v
retrieving revision 1.197
diff -p -r1.197 rtlanal.c
*** rtlanal.c 19 Jul 2004 20:24:59 -0000 1.197
--- rtlanal.c 2 Aug 2004 10:26:43 -0000
*************** loc_mentioned_in_p (rtx *loc, rtx in)
*** 3155,3161 ****
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
! if (loc == &in->u.fld[i].rtx)
return 1;
if (fmt[i] == 'e')
{
--- 3155,3161 ----
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
! if (loc == &in->u.fld[i].rt_rtx)
return 1;
if (fmt[i] == 'e')
{