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PATCH: Disable branch hints on P4
- From: "H. J. Lu" <hjl at lucon dot org>
- To: gcc-patches at gcc dot gnu dot org
- Cc: gcc at gcc dot gnu dot org
- Date: Fri, 23 Jul 2004 09:55:10 -0700
- Subject: PATCH: Disable branch hints on P4
- References: <s1012dc2.020@emea1-mh.id2.novell.com> <20040723143151.GA32438@lucon.org>
On Fri, Jul 23, 2004 at 07:31:51AM -0700, H. J. Lu wrote:
> On Fri, Jul 23, 2004 at 04:25:24PM +0200, Jan Beulich wrote:
> > It should then be gcc that gets fixed. And I can't see why it used this
>
> I was told that branch hints might not be useful at all. Icc never used
> it in production. It was thought that it might be useful before chip
> was made. But it didn't turn out that way.
>
Branch hints were put in P4 based on simulation result. But after P4
was made, Intel compiler people couldn't measure any performance
befenit with branch hints. It also increases the code size. As the
result, icc never generates branch hints. This patch disables it for
P4.
H.J.
----
2004-07-22 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.c (x86_branch_hints): Remove m_PENT4.
--- gcc/config/i386/i386.c.bh 2004-07-18 09:06:56.000000000 -0700
+++ gcc/config/i386/i386.c 2004-07-22 12:18:16.000000000 -0700
@@ -480,7 +480,7 @@ const int x86_unroll_strlen = m_486 | m_
const int x86_cmove = m_PPRO | m_ATHLON_K8 | m_PENT4;
const int x86_3dnow_a = m_ATHLON_K8;
const int x86_deep_branch = m_PPRO | m_K6 | m_ATHLON_K8 | m_PENT4;
-const int x86_branch_hints = m_PENT4;
+const int x86_branch_hints = 0;
const int x86_use_sahf = m_PPRO | m_K6 | m_PENT4;
const int x86_partial_reg_stall = m_PPRO;
const int x86_use_loop = m_K6;